1. Circuit Simulation and Analysis with HSPICE
國研院國家晶片系統設計中心
July
林棋勝

2. Product Development Process

3. Circuit Design Background
Circuit/System Design :
A procedure to construct a physical structure which is based on a set of basic component, and the constructed structure will provide a desired function at specified time/ time interval under a given working condition.
To be Defined
Input Stimuli
Output Response

4. What is Simulation
Simulation : To predict the Circuit/System Characteristic after manufacturing
Foundry
Manufacturing ?
Depends on the component behavior, simulation categories include :
Complexity
Capacity
Functional simulation
Logic/Gate Level Simulation
Switch/Transistor Level Simulation
Circuit Simulation
Device Simulation

5. Circuit Simulation Background+ -
IN+
IN-
OUT
Circuit Structure IN
Physical Structure
modeling
Circuit
Simulation
Tool f
gain
Behavior
Electrical characteristic I V

6. An Inverter Gate Circuit Design
* The file name : INV.sp
.lib ‘./rf018.l' TT
MP1 VDD IN OUT VDD pch w=2u l=0.18u
MN1 GND IN OUT GND nch w=1u l=0.18u
VDD VDD DC 1.8V
VIN IN pulse(0V 1.8V 0n 0.1n 0.1n 1n 2n)
.OP
.TRAN 0.1n 4n
.OPTIONS POST
.END
Type “ hspice INV.sp ” to simulate inverter circuit

7. Simulation Results of the Inverter
Type “ awaves & “ to view the simulation waveforms

8. Schematic and Layout Views of the Inverter

9. A 2-Input NAND Gate Circuit Design
* The file name : NAND2.sp
.lib ‘./rf018.l' TT
MP1 VDD A OUT VDD pch w=2u l=0.18u
MP2 VDD B OUT VDD pch w=2u l=0.18u
MN1 NET1 A OUT GND nch w=2u l=0.18u
MN2 GND B NET1 GND nch w=2u l=0.18u
VDD VDD DC 1.8V
VA A pulse(0V 1.8V 0n 0.1n 0.1n 1n 2n)
VB B pulse(0V 1.8V 0n 0.1n 0.1n 2n 4n)
.OP
.TRAN 0.1n 4n
.OPTIONS POST
.END

10. Simulation Results of the 2-input NAND

11. Schematic and Layout Views of the 2-input NAND

12. A 2-Input NOR Gate Circuit Design
How to design a 2-input NOR Gate Circuit ?
* The file name : NOR2.sp
.lib ‘./rf018.l' TT .
VDD VDD DC 1.8V
VA A pulse(0V 1.8V 0n 0.1n 0.1n 1n 2n)
VB B pulse(0V 1.8V 0n 0.1n 0.1n 2n 4n)
.OP
.TRAN 0.1n 4n
.OPTIONS POST
.END

13. Simulation Results of the 2-input NOR

14. Schematic and Layout Views of the 2-input NOR

15. Lab A 3-input NAND Gate Circuit Design
A 3-input NOR Gate Circuit Design

16. A layout diagram of Memory Circuit

17. A Micrograph of Memory Chip