1. A Study of Energy Efficiency Methods for Memory Mao-Yin Wang & Cheng-Wen Wu

2. LARC 2 Memory Energy Reduction Memory Compression Memory Partitioning Sleep mode control Memory bandwidth optimization Memory Hierarchy Software Approach Access Pattern Analysis Locality

3. LARC 3 OutlineOutline Introduction Relative works Conclusions

4. LARC 4 Related Work A. Farahi, G. Telez, M. Sarrafzadeh, “Memory Segmentation to Exploit Sleep Mode Operation”, DAC’95, pp. 36-41. L. Benini A. Macii, E. Macii, M. Poncino, “Region Compression: A New Scheme for Memory Energy Minimization in Embedded Systems”, EUROMICRO conference, 1999, pp. 311-317. L. Benini, A. Macii, E. Macii, M. Poncino, “Minimizing Memory Access Energy in Embedded Systems by Selective Instruction Compression”, IEEE Trans. On VLSI, vol. 10. pp. 521-531, Oct. 2002. L. Benini, L. Macchiarulo, A. Macii, M. Poncino, “Layout- Driven Memory Synthesis for Embedded Systems-on-Chip”, IEEE Trans. on VLSI, vol. 10, pp. 96-105, Apr. 2002. A. Macii, E. Macii, M. Poncino, “Improving the Efficiency of Memory Partitioning by Address Clustering”, DATE’03, pp. 18-23.

5. LARC 5 Introduction (1/2) Source: ITRS 2000

6. LARC 6 Introduction (2/2) According to the ITRS, expected 71% of area is occupied by memory in 2005 Memory is power hungry Data-intensive applications in embedded systems Energy efficiency is necessary

7. LARC 7 Memory Segmentation [1] Based on sleep mode

8. LARC 8 Memory Compression (1/3) [2] Based on consecutive instruction group in a program Limited by # of instructions in a compression region Based on consecutive instruction group in a program Limited by # of instructions in a compression region

9. LARC 9 Memory Compression (2/3) (1) (2)

10. LARC 10 Memory Compression (3/3) (3.1) (3.2)

11. LARC 11 Instruction Fetch Energy for Off-Chip FLASH Memory

12. LARC 12 Memory Traffic

13. LARC 13 Memory Usage

14. LARC 14 Memory Partitioning [4] Core SRAM (64K) SRAM (64K) data addr 28K 4K 32K Decoder

15. LARC 15 Address Clustering 43.5% Energy Reduction 56% Energy Reduction

16. LARC 16 Problem Formulation Find a relocation of a subset of the address space that maximizes the locality of the dynamic trace.

17. LARC 17 Cost Metrics Given an array C = [c 0, c 1, …, c N-1 ] Infer a single-value quantity that express its degree of spatial locality Find good sliding window such that the density is large and the sliding window is small (i.e. less encoder overhead)

18. LARC 18 Density of the Original and a Clustered Trace Sliding window W Normalized density

19. LARC 19 Exploration Algorithm

20. LARC 20 Clustering Algorithm

21. LARC 21 Energy Savings (1/2)

22. LARC 22 Energy Savings (2/2)

23. LARC 23 Encoder Energy Overhead vs. M

24. LARC 24 ConclusionsConclusions Energy efficiency methods are studied Reduce memory traffic Partition memory as smaller ones Disable memory blocks Trade off between performance and energy Application-dependent