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10.2 Characteristics of Computer Memory RAM provides random access Most RAM is volatile
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10.3 Static and Dynamic RAM Technologies Static RAM –The miniature circuit contains many transistors that operate continuously Dynamic RAM –Uses a circuit that acts like a capacitor –An external refresh circuit must periodically read the data value and write it back again
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.4 Measures of Memory Technology Density –Tends to double approximately every 18 months. Latency and Cycle times –The time required to fetch information differs from the time required to store information.
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10.7 Latency and Memory Controllers Latency is an insufficient measure of performance A performance measure needs to measure the time required for successive operations
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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Two Separate measures The read cycle time (tRC) The write cycle time (tWC)
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10.8 Synchronized Memory Technologies The clock pulses used with the memory system are aligned with the clock pulses used to run the processor. SDRAM –Synchronized Dynamic RAM SSRAM –Synchronized Static RAM
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10.9 Multiple Data Rate Memory Technologies Double data rate Quadruple data rate
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.12 Memory Access and Memory Bus A memory controller provides the interface between a physical memory and a processor that uses the memory To achieve high performance, memory systems use parallelism
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.13 Memory Transfer Size The parallel connections define a memory transfer size
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10.14 Physical Address and Words Each word of physical memory is assigned a unique number known as a physical memory address
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.16 Word Size and Other Data Types The word size is chosen as a compromise between performance and varies costs.
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10.17 An Extreme Case: Byte Addressing Two important consequences –Byte addressing requires more addresses –The memory controller must support byte transfer
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.19 Using Powers of Two Word address can be computed by extracting everything except the two low order bits.
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.20 Byte Alignment and Programming Aligning data on boundaries that corresponding to the physical word size can improve program performance.
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.22 Programming with Word Addressing On a processor that uses word addressing, software must handle the details of byte manipulation To optimize software performance, logical shifts and bit masking are used to manipulate an address
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10.23 Measures of Memory Size Physical memory is organized into a set of M words that each contain N bytes. To make controller hardware efficient, M and N are each chosen to be powers of two
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.26 Indirection and Indirect Operands Because the operand specifies indirection, the processor treats the resulting value as an address in memory
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10.27 Memory Banks and Interleaving Instead of a single memory and a single controller, the processor connect to multiple memory banks that each has its own controller. Interleaving spreads consecutive bytes of memory across separate physical memory modules
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.28 Content Addressable Memory A Content Addressable Memory includes hardware for high speed searching. A search key is the same size as a slot in the CAM Each slot contains hardware that performs the comparison
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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10.29 Ternary CAM A Ternary CAM only performs the match on bits that have the value zero or one.
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