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1 Jan 07 RAMP PI Report: Plans until next Retreat & Beyond Krste Asanovíc (MIT), Derek Chiou (Texas), James Hoe(CMU), Christos Kozyrakis (Stanford), Shih-Lien Lu (Intel), Mark Oskin (Washington), David Patterson (Berkeley, CO-PI), and John Wawrzynek (Berkeley-PI)
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2 Executive Summary RAMP component “API” RAMP-White Demonstration Student Community Team-Building RDL’ization Project (aka RAMP Bootcamp) FCRC Tutorial Plan
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3 RAMP Component “API” Position: RAMP’s goal is to provide infrastructure to explore interesting architectures PI’s and students will define an initial set of useful baseline components (specifically their interfaces) Plan Use RDL as component interface spec language Derek derive first draft from current RAMP-White 2-day meeting to refine and finalize proposal? Share component development---rely on each other to complete the whole picture Setup SVN repository for versioning and archiving (Question: include reference software models?)
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4 RAMP-White Position: RAMP-White demos how to build a system in RAMP, not what to build RAMP-white will use RDL’ized components Shared-memory MP of Leon cores Each student will contribute a piece of the finished puzzle Accurate target time dilation/clock cycle accounting RAMP-white leverages co-simulation technology simulated I/O subsystem (RDL’ized Simics) Simics user/control interface E.g., Simics interface to BEE2 boards running 64 Leons; speed of 64 parallel 50 MHz computers with Simics multiprocessor UI (breakpoints, visualization, …)
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5 RAMP Student Community Position: RAMP students working together on one project Plan: Precede future RAMP retreats with separate student-only retreats Have regular (bi-weekly?) phone conference for design reviews and to coordinate progress Participate in a RAMP RDL’ization Project bootcamp ASAP (see next slide)
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6 RDL’ization Project Position: RAMP-White will use RDL RDL’ization project by RAMP students A fun-filled 1-week get away at locale TBD Start with working components from Leon3/GRLIB Finish with a working RDL’ized Leon3 system (Get the MP version to work?) Outcomes: Get to know RDL Get to know each other Useful RDL’ized components Jump start RAMP-White
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7 FCRC Tutorial at CS Olympics Announcement (not available) to generate interest in both architecture & programming communities Thacker talks about M/S plans for making & using RAMP Showcase RAMP’s unique capabilities Scalability to large MP systems (512 CPU Blue) Working experimental designs (128 CPU Red T.M.) DIFT Security testimonial? (HW reduce kernel 40X to 500 LOC prove kernel correct ) Announce future release plans (boards & gateware) Participants hands on use of RAMP systems 1/2 day Participants get to take home Xilinx XUP-II board and EDK A CD of example RAMP systems to build and run on XUP-II (Question: How to distribute RAMP-Blue Microblaze?)
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