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Audio Processing Unit (APU) Clint Lozinsky Richard Schultz Duncan Campbell Grant Cunningham
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Overview Digital Audio Signal Processor Developed using Xess XSA-100 and Xtend board combination. Samples an analog input, processes and stores signal digitally, and outputs an audio signal suitable for playback.
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Features Fast Fourier Transform Recording and Playback SDRAM and Codec Interfaces Real-Time Audio Effects Chorus, Flange, Echo, Phaser User Interface Push Buttons and LCD
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General Block Diagram User Interface Controller Pushbutton Inputs LCD Controller Effects Engine Effects Engine Storage Unit SDRAM Stereo Codec
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Recording & Playback Module Interfaces Stereo Codec and SDRAM to store audio. Stores up to 3 minutes of audio.
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Effects Engine Circular Buffer uses SDRAM. Capable of Echo, Chorus, Flange, Phaser. Versatile design allows for easy modification and customization.
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User Interface Two push buttons to scroll and select states in a Finite State Machine. Messages for LCD are stored in core generated ROM. LCD driver initializes display and the LCD decoder pulls characters from ROM and sends to display.
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Fast Fourier Transform Limited by size of the chip. Designs using the Xilinx Core, and another with shift registers were unsuccessful. Only feasible with the use of RAM. Development yet to be finalized.
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