1. Computer Architecture I (1DT016) Cary Laxer, Ph.D. Visiting Lecturer

2. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 12 Today’s class Introductions Computer organization overview Introduction to assembly language programming

3. Introductions

4. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 14 Instructor Cary Laxer Visiting lecturer Home institution is Rose-Hulman Institute of Technology, Terre Haute, Indiana, USA Professor and Head of Computer Science and Software Engineering Bachelor’s degree in computer science and mathematics from New York University Ph.D. in biomedical engineering from Duke University

5. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 15 Course Information is maintained on the course website: www.it.uu.se/edu/course/homepage/dark/ht07 www.it.uu.se/edu/course/homepage/dark/ht07 Three weekend meetings  Friday and Saturday each time  Lecture and lab time both days Texts  Structured Computer Organization (Fifth Edition) by Andrew S. Tanenbaum  Introduction to RISC Assembly Language Programming by John Waldron

6. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 16 Introduce yourselves Tell us:  Your name  Your hometown  Your computer background  Something interesting about yourself

7. Computer organization overview

8. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 18 Programs and languages Program – a sequence of instructions to perform a certain task High level language – English-like programming languages such as C++, Java, etc. Machine language – computer’s primitive instruction set (e.g. add two numbers, compare a number to 0) Assembly language – mnemonics for machine language instructions

9. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 19 Languages, Levels, Virtual Machines A multilevel machine

10. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 110 Contemporary Multilevel Machines

11. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 111 Milestones in Computer Architecture (1)

12. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 112 Milestones in Computer Architecture (2)

13. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 113 Computer Generations Zeroth Generation Mechanical Computers (1642 – 1945) First Generation Vacuum Tubes (1945 – 1955) Second Generation Transistors (1955 – 1965) Third Generation Integrated Circuits (1965 – 1980) Fourth Generation Very Large Scale Integration (1980 – ?)

14. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 114 Von Neumann Machine

15. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 115 PDP-8 Innovation – Single Bus

16. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 116 IBM 360

17. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 117 The Computer Spectrum

18. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 118 Personal Computer 1. Pentium 4 socket 2. 875P Support chip 3. Memory sockets 4. AGP connector 5. Disk interface 6. Gigabit Ethernet 7. Five PCI slots 8. USB 2.0 ports 9. Cooling technology 10. BIOS

19. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 119 Intel Computer Family

20. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 120 The Pentium 4 Chip

21. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 121 Metric Units The principal metric prefixes.

22. Introduction to Assembly Language

23. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 123 Number systems Decimal (base 10) Binary (base 2) Hexadecimal (base 16)

24. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 124 Two’s complement numbers Represent negative integers to the computer To determine the two’s complement of an integer:  Invert all the bits (make zeroes ones and ones zeroes)  Add 1 Example: 29 = 0001 1101  Invert all the bits: 1110 0010  Add 1: 1110 0011 (this is -29)

25. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 125 Integer storage and capacities Bit – 0 or 1 (one binary digit) Nibble – 4 bits, 0-15 (one hex digit) Byte – 8 bits, 2 hex digits, 0-255 or -128 to +127 Word – 4 bytes, 32 bits, 8 hex digits  0 to 2 32 -1 or 0 to 4,294,967,295 unsigned  -(2 31 ) to 2 31 -1 or -2,147,483,648 to +2,147,483,647 signed

26. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 126 Characters ASCII (American Standard Code for Information Interchange) EBCDIC (Extended Binary-Coded Decimal Interchange Code) Unicode

27. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 127 In-class exercise Write the number 300 10 in:  Binary  Hex Write the number -78 10 in:  Eight-bit two’s complement binary notation  32-bit two’s complement hexadecimal notation Using one byte to store integers, what happens when you add:  255 + 1 using unsigned numbers  127 + 1 using signed numbers

28. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 128 The MIPS Processor MIPS = Microprocessor without Interlocked Pipeline Stages It is a RISC (reduced instruction set computer) architecture Currently used in many embedded systems, such as TiVO, Windows CE devices, Nintendo 64, and Sony Playstation 2

29. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 129 MIPS Memory Organization Memory is byte- addressable 0x00000000 0x00 0x00000001 0xA0 0x00000002 0x3E 0x00000003 0x10 0xFFFFFFFC 0x90 0xFFFFFFFD 0x6F 0xFFFFFFFE 0xA1 0xFFFFFFFF 0x00...... Addresses of memory cells Each cell holds one byte

30. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 130 MIPS Memory Layout A program’s address space is composed of three parts:  At the bottom of the user address space (0x00400000) is the text segment, which holds the program’s instructions  Starting at address 0x10000000 is the data segment  The program stack resides at the top of the address space (0x7FFFFFFF) and grows down Stack segment Reserved Text segment Data segment 0x7FFFFFFF 0x00400000 0x10000000......

31. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 131 MIPS Registers Program counter (PC) – holds address of next instruction to be executed 32 general purpose registers, numbered 0-31  Register n is designated by $n or Rn  Register zero, $0, always contains the hardwired value 0  There are conventions governing their use (see Table 3.1 on page 20 of Waldron) 16 floating point registers $f0…$f15 to hold floating point numbers

32. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 132 SPIM Simulator Runs programs for the MIPS assembly language on other platforms Free versions available online (I got a Windows version at http://pages.cs.wisc.edu/~larus/spim.html) http://pages.cs.wisc.edu/~larus/spim.html

33. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 133 SPIM I/O 10 operating system-like services through the syscall instruction Load the system call code (see Table 3.2 on page 22 of Waldron) into register $v0 ( $2 ) Load the arguments into registers $a0…$a3 ( $4…$7 ) (or $f12 for floating point values) Return values are placed in register $v0 (or $f0 for floating point results)

34. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 134 Hello World.text.globl __start __start:# execution starts here la $a0,str# put string address into a0 li $v0,4# system call to print syscall# out a string li $v0,10 syscall# au revoir....data str:.asciiz "hello world\n"

35. Informationsteknologi Friday, September 28, 2007Computer Architecture I - Class 135 Demonstration Demo of PCSpim using the Hello World programPCSpim