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Montek Singh COMP790-084 Oct 6, 2011
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Today’s topics: ◦ approximate arithmetic ◦ simple applications Next time: ◦ more applications ◦ architectures and design tools ◦ challenges and benefits ◦ open questions
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Supply reduced voltage to adder gates ◦ fine-grain: each stage receives own voltage ◦ coarse-grain: use binning
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Error induced: Energy consumed:
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Voltage selection ◦ fine-grain: each stage receives own voltage ◦ coarse-grain: use binning
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Geometric model for voltage assignment ◦ higher order bit receives progressively higher voltage
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Energy-correctness tradeoff
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Energy-correctness tradeoff example
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Lower voltage causes clock deadline to be missed ◦ some of the longer carry chains cannot complete!
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Example: DFT
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