1. Submitters: Erez Rokah Erez Goldshide Supervisor: Yossi Kanizo

2. Motivation A switch is a computer networking device that connects network segments Switches form the Internet infrastructure It is critical for switches to be fast, with high throughput, reliable, modular, cost and power effective We will evaluate switches with the following measures in mind: Throughput and Delay (speed).

3. Performance Measures Throughput The average rate of successful data delivered by the switch. Thus, we would like to maximize the throughput Delay The average time interval between packet arrival time to the switch and exit time (total average time spent in the system) Thus, we would like to minimize the delay

4. Switching Architectures In order to support multiple inputs and output a switch must contains buffers The switching architecture can be categorized by the location of the buffers: Output Queued Switch – buffers at the outputs Input Queued (with VOQ) Switch – buffers at the inputs Buffered Crossbar Switch – similar to Input Queued, just with a small sized buffer at the cross points Cross Point Queued Switch – only cross points have buffers

5. IQVOQ and XBar Switches IQ – Input Queued Linecards Switch Fabric CICQ – Combined Input and Crosspoint Queued (Buffered Crossbar) Linecards Taken from: Yossi Kanizo, David Hay and Isaac Keslassy, "The Crosspoint-Queued Switch,"

6. Cross Point Queued Switch Switch Core Taken from: Yossi Kanizo, David Hay and Isaac Keslassy, "The Crosspoint-Queued Switch,"

7. Project Goals Studying the current high-speed switch architectures Evaluation of current switching architectures Simulate the basic switching architectures mentioned above Compare to the theorem and mathematical analysis Object Oriented Design (using C#) Modular Design

8. Simulation Flow Input Generator generates cells for current cycle Input cells are inserted into the switch queues Logger logs current cycle results The switch scheduler decides which queues are processed and outputs the corresponding cells

9. Design: CrossPoints InputGenerator and General

10. Design: Scuedulers

11. Design: Switches

12. The Switch Class Abstract Class for defining the switch object Contains the number of inputs, number of outputs, cross points matrix and a scheduler object to handle the switch queues Deriving classes (switches) must implement methods for handling incoming cells (inserting to queues) and a method for clearing the switch.

13. Implemented Switches OutputQueuedSwitch – implements a switch with queues at the outputs. InputQueuedVOQSwitch - implements a switch with queues at the inputs. BufferedCrossBarSwitch – implements a switch based on the Buffered Crossbar Architecture. CrossPointQueuedSwitch - implements a switch based on the Cross Point Queued Switch Architecture.

14. The Scheduler Class Abstract Class for defining the scheduler object Allows modular implementation of various scheduling algorithms Deriving classes (various schedulers) must implement the ‘get_match_from_queues’ method, according to the desired scheduling algorithm (e.g. Round Robin, First Come First Served)

15. Implemented Schedulers OQFCFSScheduler which outputs cells from the output queues using the FIFO algorithm. XBarRRInRROutScheduler which selects input queues and cross point buffers using the RR algorithm. IQMaximumScheduler which selects input queues using the Maximum Matching algorithm. IQPIMMaximalScheduler which selects input queues using the PIM algorithm. CQLQFScheduler which selects cross point queues using the LQF algorithm. Allows both exhaustive and non exhaustive LQF. CQRandomScheduler which selects cross point queues using the Random algorithm. Allows both exhaustive and non exhaustive Random. CQRRScheduler which selects cross point queues using the RR algorithm. Allows both exhaustive and non exhaustive RR.

16. The InputGenerator Class Abstract Class for defining the Input Generator object Deriving classes must implement the ‘get_next_packets’ method, according to the desired input we want to simulate (e.g. Bernoulli Independently and Identically Distributed, Trace Driven)

17. Implemented Input Models BernoulliInputGenerator which generates input cells according to a traffic matrix (as described in the background section). TraceDrivenInputGenerator which generates input cells according to the data in a trace file. OnOffInputGenerator which generates a bursty traffic followed by a commonly used model.

18. Simulation Result with Analytical Analysis OQ switch with 30 inputs, 10 outputs 1-sized output queues and FIFO scheduling. Bernoulli IID input model with p=0.5. The Bernoulli Trials:

19. Simulation Results 32x32 CQ switch under uniform traffic (p=1)

20. Simulation Results 32x32 CQ switch under trace-based traffic

21. Simulation Results 32x1 CQ switch under on-off traffic

22. Simulation Results Throughput (average load) of a 32x32 IQVOQ switch under uniform traffic (p=1) and using PIM matching algorithm with 10 iterations (infinite sized queues). The resulted throughput was 0.9959. Throughput (average load) of a 32x32 XBar switch under uniform traffic (p=1 and infinite sized input queues). The resulted throughput was 0.9978. Throughput (average load) of a 32x32 XBar switch under trace-based traffic (infinite sized input queues). The resulted throughput was 0.982.

23. Conclusions All switches, provided that the queues’ capacity is high enough, can reach near 100% throughput. Exhaustive scheduling algorithms are best when using small sized queues with burst income traffic. The “Longest Queue First” algorithm gives the overall best results for a Crosspoint Queued Switch.

24. Future Development This project goal was to provide a modular code for implementing and running simulations of various switching architectures. The modularity of the code allows future development of: More switching architectures. More scheduling algorithms. More input models. Also it is possible to further develop a GUI for running and displaying simulation results, and even real time cells flow.

25. Literature Yossi Kanizo, David Hay and Issac Keslassy, “The Crosspoint- Queued Switch”, Technical Report TR08-04, Comnet, Technion, Israel (article and slides). 046993 – High Speed Networks course’s slides, Electrical Engineering Department, Technion, Israel. Google. “Solver for the Maximum Weight Matching Problem”. Available: http://elib.zib.de/pub/Packages/mathprog/matching/weighted/

26. Thank you for you attention © Erez & Erez