1. Scheduling for Power, Reliability and Performance Yavuz Yetim Princeton University

2. A little bit AMPL

7. Last Time Thread 1: Thread 2: Tasks t1t3 t1 t2 t3 t4 t2 i)Mutual Exclusion in a core ii)Sequencing of tasks wrt the dependency graph iii)Deadlines of threads iv)Max Expected Number of Errors for threads v)Thread Migration Overhead (Both Energy and Time) i)Idle Time Core 1 (T) : Core 2 (2T) : t1 t2 t3 t4 : 2: 4 Time Deadline 1 Deadline 2 i ii ii i iviv v vivi

10. Schedule Min for “Red t4” Thread 1: Thread 2: Tasks t1t3 t1 t2 t3 t4 t2 Core 1 (T) : Core 2 (2T) : Time t1t2 t4

11. Exactly the opposite: – Using deadlines – Recursive tree traversal Schedule Min for “Red t4”

12. No solution here

13. Conclusion & Future Work Formulation Optimizations Input Optimizations Results Real Benchmark & Hardware Programming Language Support