Presentation is loading. Please wait.

Presentation is loading. Please wait.

CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739

Similar presentations


Presentation on theme: "CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739"— Presentation transcript:

1 CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739 alphonce@buffalo.edu

2 cell phones off (please) 2

3 Setting the flip-flop The normal value of R and S is zero. S (set) = 0 R (reset) = 0 remembered value 3

4 Setting the flip-flop To store 1 in the flip-flop, we “raise” S to 1… S (set) = 1 R (reset) = 0 remembered value 4

5 Setting the flip-flop …which makes the output of the OR gate 1. S (set) = 1 R (reset) = 0 remembered value 5 1

6 Setting the flip-flop The NOT gate inverts this 1 value to 0, which becomes the second input to the upper OR gate. S (set) = 1 R (reset) = 0 remembered value 6 10 0

7 Setting the flip-flop Since both inputs of the upper OR gate are zero, its output is zero. S (set) = 1 R (reset) = 0 remembered value 7 1 0 0 0

8 Setting the flip-flop The NOT gate inverts this 0 to a 1; this value becomes the second input to the bottom OR. S (set) = 1 R (reset) = 0 remembered value 8 1 0 0 0 1 1

9 Setting the flip-flop Because the output of the bottom OR gate will now stay at 1, we can lower S to zero, and the circuit will stay in a stable state, with 1 as the remembered value! 9 Resetting the flip-flop Resetting the remembered value to zero is similar, except we raise, then lower, the value on R. S (set) = 0 R (reset) = 0 remembered value 1 0 0 0 1 1

10 One-bit Half Adder 10 A B S C

11 One-bit Half Adder 11 A= 0 B = 0 S = ? C = ? 0 + 0 0 (carry 0)

12 One-bit Half Adder 12 A= 0 B = 0 S = 0 C = 0 0 0 0 0 0 0 0 1 1 0 + 0 0 (carry 0)

13 One-bit Half Adder 13 A= 0 B = 1 S = 1 C = 0 0 1 1 0 1 1 0 1 1 0 + 1 1 (carry 0)

14 One-bit Half Adder 14 A= 1 B = 0 S = 1 C = 0 1 0 1 1 0 1 0 1 1 1 + 0 1 (carry 0)

15 One-bit Half Adder 15 A= 1 B = 1 S = 0 C = 1 1 1 1 1 1 1 1 0 0 1 + 1 0 (carry 1)

16 One-bit Full Adder 16 A B CoutCout S CinCin

17 Encoding machine instructions Op-code + operands Hardware decodes and executes 17

18 Computer Organization Central Processing Unit (CPU) –Registers General purpose (e.g. R1 – R16) Special purpose (e.g. Program Counter and Instruction Register) –Arithmetic Logic Unit (ALU) Memory 18


Download ppt "CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739"

Similar presentations


Ads by Google