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CSE111: Great Ideas in Computer Science Dr. Carl Alphonce 219 Bell Hall Office hours: M-F 11:00-11:50 645-4739 alphonce@buffalo.edu
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Announcements First exam Wednesday next week –Closed book –Bring your UB card Monday next week: review 2
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cell phones off (please) 3
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A flip-flop S (set) = 0 R (reset) = 0 remembered value 4
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One-bit Half Adder 5 A B S C
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One-bit Full Adder 6 A B CoutCout S CinCin
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Encoding machine instructions Op-code + operands Hardware decodes and executes 7
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Computer Organization Central Processing Unit (CPU) –Registers General purpose (e.g. R1 – R16) Special purpose (e.g. Program Counter and Instruction Register) –Arithmetic Logic Unit (ALU) Memory 8
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Computer Organization 9 Processor (CPU) Memory (RAM) 11010010 R1R2... R16 PC IR ALU 11010010 00000001 00000010 00000011 00000100 00000101 00000110 00000111 Each memory location has a unique address
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A closer peek at the ALU 10 1101 0110 A B (half adder) C Out S A B (full adder) C out C In S A B (full adder) C out C In S A B (full adder) C out C In S 1 1 0 0 001 1
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Encoding instructions Example –1101000001000010 –INSTR ARG1 ARG2 –ADD Reg1 Reg2 11
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This wire will carry a 1 only if the op code of the instruction is 1101. Instruction decoding 12 1 1 0 1 0 0 0 0 0 1 0 0 0 0 1 0 Circuitry to decode rest of instruction and carry it out (“execute” the instruction) “ADD” OP CODE R1 R2
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