1. Introduction to Layout
Jack Ou, Ph.D.
CES 522 V
VLSI Design
Sonoma State University

2. Flow Chart

3. Cross Sectional of an Inverter

4. S S D D
Mask Set

5. Basic Ingriedents n-well (N_WELL) Polysilicon (POLY) n+ diffusion
p+ diffusion
contact
metal

6. Manufacturing
the n-well
Grow a protective
Layer of oxide.
Remove oxide
in selected region
Ion Implantation

7. Poly silicon
(doped to make
good conductor,
Block n+ diffusion)
n-diffusion

8. p-diffusion, contacts and metal
Thick metal oxide provides insulation
p+ diffusion is made selectively using silicon dioxide
and photo resist

9. λ λ is half of the smallest feature size
In 0.18 um, λ is 0.09 um
λ based design rules makes it easy to migrate from one process to process.
Industrial design rules are usually specified in microns, which makes it difficult to migrate to a more advanced process.

10. Simplified λ based design rules

11. Example from tsmc 0.18 um process
POLY has a width of 2 λ
Contacts are 2 λ x 2 λ

12. Design Rules

13. Schematic/Layout of an Inverter
VDD
p+ diffision
n+ diffision
Ground

14. Schematic/Layout of a NAND2
VDD
p+ diffision
n+ diffision
Ground

15. Substrate Contact

16. P_WELL

17. P_WELL+P_PLUS_SELECT

18. P_WELL+P_PLUS_SELECT+Active(43)

19. P_WELL+P_PLUS_SELECT+Active(43)+Contact to Active

20. P_WELL+P_PLUS_SELECT+Active(43)+Contact to Active+Metal1

21. Nwell Contact

22. NWELL

23. NWELL+N_Plus_Select+

24. NWELL+N_Plus_Select+Active Layer

25. NWELL+N_Plus_Select+Active Layer+Contact to Active Layer

26. NWELL+N_Plus_Select+Active Layer+Contact to Active Layer+Metal 1

27. DRC

28. DRC Check: to run DRC First: to see the first DRC violation
Next: to step through the DRC errors

29. DRC Results
DRC violation

30. Use the Rule Deck to Repair the Layout

31. Repaired Layout
Enlarged N Plus Select
Reduced Result Count