1. 55:035 Computer Architecture and Organization Lecture 1

2. Introduction  Introduction Description Course Outline  Administrative  Brief History of Computers  Overview of Computer Organization  Overview of Computer Performance  Case Study: Intel Processors 255:035 Computer Architecture and Organization

3. Introduction  Description from ISIS Basic concepts; computer evolution, register transfer level design, simulation techniques, instruction sets (CISC and RISC), assembly language programming, ALU design, arithmetic algorithms and realization of arithmetic functions, hardwired and micro- programmed control, memory hierarchies, virtual memory, cache memory, interrupts and DMA, input/output; introduction to high-performance techniques, pipelining, multiprocessing; introduction to hardware description languages (Verilog, VHDL); students design and simulate a simple processor. 355:035 Computer Architecture and Organization

4. Introduction  Course Outline Introduction [chap 1] (2)  Brief History  Overview of Computer Organization Architecture: Instruction Set Design [chap 2] (6)  Information representation & arithmetic operations  Instruction Formats, Addressing Modes  Assembly language Programming  Basic input/output operations  Subroutine linkage 455:035 Computer Architecture and Organization

5. Introduction  Course Outline, cont’d Case Studies of Instruction Set Architecture [chap. 3] (4)  Motorola M68000  ARM  Intel Pentium Computer Arithmetic and ALU Design [chap. 6] (6)  Addition (Subtraction)  Multiplication (Division)  Shifting and Rotating  Floating Point Arithmetic 555:035 Computer Architecture and Organization

6. Introduction  Course Outline, cont’d Verilog / VHDL Tutorials [Supplemental material] (6) Memory [chap 5] (6)  Semiconductor Memory Technology  Cache Memory  Virtual Memory  Memory Management and Case Studies 655:035 Computer Architecture and Organization

7. Introduction  Course Outline, cont’d Processor Design [chap 7] (6)  Datapath design  Control Unit Design  Microprogramming  Exception Handling Input/Output [chap 4] (4)  Device Interfacing and Addressing  Interrupts  Bus Design Additional topics [selected from chapters 8-12] 755:035 Computer Architecture and Organization

8. Administrative Lectures  Time: M/W/F 8:30 - 9:20 AM  Room: 4030 SC Instructor  James Maxted: jmaxted@engineering.uiowa.edu  Design engineer for Rockwell Collins (35 years)  Office: 1126 SC, hours M/W/F 9:30 - 10:20 AM TA  Dakai Jin: dakai-jin@uiowa.edu  Office: 1313 SC, hours 855:035 Computer Architecture and Organization

9. Administrative (cont’d)  Grading Approximately 1 homework per week 1 multi-part project 2 exams (1 mid-term, final) Weighting  Homework 14%  Project 36%  Midterm 20%  Final 30% 955:035 Computer Architecture and Organization

10. Administrative (cont’d)  Course webpage Place to find syllabus, lecture notes, homework, etc http://www.engineering.uiowa.edu/~carch/  Project Design and simulate a simple processor Mentor Graphics tools VerilogHDL 1055:035 Computer Architecture and Organization

11. Administrative (cont’d)  Collaboration Discussion of the material is encouraged, but… All students are expected to do their own work  Disabilities Please contact me (office hours or email) 1155:035 Computer Architecture and Organization

12. Brief History of Computers Computing Aids  Abacus and Counters  Abacus: Greek for board or slab  Probably originated in Middle East  Invented 2000+ years ago  Napier’s Rods (Bones)  Assisted multiplication, square roots, and cube roots  Invented around 1600  Chalk Board  Interest Table  Shows interest for varying principles and periods of time 55:035 Computer Architecture and Organization12

13. Brief History of Computers Machines that Calculate or Control  Adding machines  Blaise Pascal’s “Pascaline”  1642  Automatic loom  Punch cards used to control a manufacturing process  1800  Cash register  “Incorruptible cashier”  1900 55:035 Computer Architecture and Organization13

14. Brief History of Computers Electromechanical Devices  Hollerith 1890 Census Tabulator  Punch, tabulator and sorting box  International Business Machines (IBM)  Accounting Machines  Changed circuits by moving cables in plugboards  Early 1900s  Ciphering and deciphering  Encode and decode secret messages during World War II  Enigma and Bombe 55:035 Computer Architecture and Organization14

15. Brief History of Computers Electronic Computers  Vacuum tube  ENIAC: 17,000 tubes, 30 tons, 1800 ft 2  1945  Transistor  IBM System/360 Family  Compatible processors, Standardized peripherals and connections  1962  Integrated circuit  IBM PC  Intel 8088  1981 55:035 Computer Architecture and Organization15

16. The First Programmer Ada Augusta or Charles Babbage Robert Campbell, Richard Bloch, Grace Murray Hopper, or Howard Aiken Brief History of Computers 1655:035 Computer Architecture and Organization

17. John von Neumann - IAS 1755:035 Computer Architecture and Organization

18. von Neumann Architecture  Sequential operation  Automatic (without human intervention)  Five elements: Input Output Memory Arithmetic Unit Control 1855:035 Computer Architecture and Organization

19. Revised von Neumann Architecture 1955:035 Computer Architecture and Organization

20. The Stored Program Concept  Programming the Harvard Mark I was by external paper tape  The ENIAC was “programmed” by rewiring it completely! 2055:035 Computer Architecture and Organization

21. The First Business Computer  LEO — Lyons Electronic Office — 1950 Modeled after the EDSAC  UNIVAC — Universal Automatic Computer — 1951 for the Census Bureau Perhaps the first mass produced machine  ERMA — Electronic Recording Means of Accounting —1957 for Bank of America 2155:035 Computer Architecture and Organization

22. The First Bug 2255:035 Computer Architecture and Organization

23. I/O Processor Output Memory Input and Arithmetic logic Control Basic functional units of a computer 2355:035 Computer Architecture and Organization

24. Connections between the processor and the memory 2455:035 Computer Architecture and Organization Processor Memory PC IR MDR Control ALU R n1- R 1 R 0 MAR n general purpose registers

25. Single-bus structure 2555:035 Computer Architecture and Organization MemoryInputOutputProcessor

26. Printer Disk Program routines OS Time t 0 t 1 t 2 t 3 t 4 t 5 Sharing the processor 2655:035 Computer Architecture and Organization

27. Main memory Processor Bus Cache memory The processor cache 2755:035 Computer Architecture and Organization

28. Basic Performance Equation N is the actual number of instruction executions S is the average number of basic steps needed to execute one machine instruction R is the clock rate T is the processor time required to execute a program that has been prepared in some high-level language

29. Instruction Sets: CISC and RISC  RISC – Reduced Instruction Set Computers (smaller S likely leads to larger N)  CISC – Complex Instruction Set Computers (larger S likely leads to smaller N)

30. Performance Measurement System Performance Evaluation Corporation n is the number of the benchmarks programs in the suite

31. Intel Processors: 4004  First microprocessor (1971) For Busicom calculator  Characteristics 10  m process 2300 transistors 400 – 800 kHz 4-bit word size 16-pin DIP package  Masks hand cut from Rubylith Drawn with color pencils 1 metal, 1 poly (jumpers) Diagonal lines (!) 3155:035 Computer Architecture and Organization

32. Intel Processors: 8008  8-bit follow-on (1972) Dumb terminals  Characteristics 10  m process 3500 transistors 500 – 800 kHz 8-bit word size 18-pin DIP package  Note 8-bit datapaths Individual transistors visible 3255:035 Computer Architecture and Organization

33. Intel Processors: 8080  16-bit address bus (1974) Used in Altair computer  (early hobbyist PC)  Characteristics 6  m process 4500 transistors 2 MHz 8-bit word size 40-pin DIP package 3355:035 Computer Architecture and Organization

34. Intel Processors: 8086 / 8088  16-bit processor (1978-9) IBM PC and PC XT Revolutionary products Introduced x86 ISA  Characteristics 3  m process 29k transistors 5-10 MHz 16-bit word size 40-pin DIP package  Microcode ROM 3455:035 Computer Architecture and Organization

35. Intel Processors: 80286  Virtual memory (1982) IBM PC AT  Characteristics 1.5  m process 134k transistors 6-12 MHz 16-bit word size 68-pin PGA  Regular datapaths and ROMs Bitslices clearly visible 3555:035 Computer Architecture and Organization

36. Intel Processors: 80386  32-bit processor (1985) Modern x86 ISA  Characteristics 1.5-1  m process 275k transistors 16-33 MHz 32-bit word size 100-pin PGA  32-bit datapath, microcode ROM, synthesized control 3655:035 Computer Architecture and Organization

37. Intel Processors: 80486  Pipelining (1989) Floating point unit 8 KB cache  Characteristics 1-0.6  m process 1.2M transistors 25-100 MHz 32-bit word size 168-pin PGA  Cache, Integer datapath, FPU, microcode, synthesized control 3755:035 Computer Architecture and Organization

38. Intel Processors: Pentium  Superscalar (1993) 2 instructions per cycle Separate 8KB I$ & D$  Characteristics 0.8-0.35  m process 3.2M transistors 60-300 MHz 32-bit word size 296-pin PGA  Caches, datapath, FPU, control 3855:035 Computer Architecture and Organization

39. Intel Processors: Pentium Pro/II/III  Dynamic execution (1995-9) 3 micro-ops / cycle Out of order execution 16-32 KB I$ & D$ Multimedia instructions PIII adds 256+ KB L2$  Characteristics 0.6-0.18  m process 5.5M-28M transistors 166-1000 MHz 32-bit word size MCM / SECC 3955:035 Computer Architecture and Organization

40. Intel Processors: Pentium 4  Deep pipeline (2001) Very fast clock 256-1024 KB L2$  Characteristics 180 – 90 nm process 42-125M transistors 1.4-3.4 GHz 32-bit word size 478-pin PGA  Units start to become invisible on this scale 4055:035 Computer Architecture and Organization

41. Intel Processors: Core 2 Duo  2006  Characteristics  65nm and 45nm  291 million transistors  2.5 GHz+ operation  32-bit word size  LGA775  Dual core  14 stage pipeline  Each gets L1 instruction and data caches  Shared L2 cache Source: Intel 4155:035 Computer Architecture and Organization

42. Transistors in Intel Processors 4255:035 Computer Architecture and Organization

43. Clock Frequencies of Intel uP 4355:035 Computer Architecture and Organization

44. Intel Summary  10 4 increase in transistor count, clock frequency over 30 years! 4455:035 Computer Architecture and Organization

45. Clock Increases Have Slowed 4555:035 Computer Architecture and Organization

46. Levels of Abstraction Adapted from “Digital Integrated Circuits” copyright 2003 Prentice Hall/Pearson 4655:035 Computer Architecture and Organization

47. Levels of Abstraction (cont’d) 4755:035 Computer Architecture and Organization