1. CS 311: Computer Organization
Aim of this course:
This course (CS 311) deals with computer architecture as well as computer organization. Computer architecture is concerned with the structure and behavior of the various functional modules of the computer and how they interact to provide the processing needs of the user. Computer organization is concerned with the way the hardware components are connected together to form a computer system.
Instructor
Prof. Hyunsoo Yoon (윤현수),
CS Dept. KAIST
Office: Rm #3435, E3-1, KAIST
Phone: x3529,
Main Text
M. Morris Mano, “Computer System Architecture,” Prentice-Hall Inc., 3rd ed.
Supplementary Text
D. Patterson & J. Hennessy, “Computer Organization & Design:
The Hardware/Software Interface”

2. CS 311: Computer Organization
Class Note based on the main text (Available at the instructor’s home page,
TA:
정병진
Byungjin Jeong
#3436
x7729
권오민
Ohmin Kwon
#3446
x7829
김선우
Sunwoo Kim
권병태
Byungtae Kwon
(Tentative) Grading Policy:
Midterm(37%), Final(48%), HW(10%), Reserved(5%)
Days/Time/Room:
Tue, Thu / 2:30 - 3:45 / Rm #102, Building N1
Midterm: 1:00 ~ 3:45 pm, April 23, 2015
Final Exam: 1:00 ~ 3:45 pm, June 18, 2015

3. Courses Offered by Prof. Yoon
CS 310: Embedded Computer System (O)
CS 311: Computer Organization (OO)
CS 440: Data Communication (OO) X
CS 510: Computer Architecture (O)
CS 544: Information Security (O)
CS 614: Advanced Computer Architecture (O)
CS 710: Topics in Computer Architecture (OO)
CS 712: Topics in Parallel Processing (OO)

4. Course Syllabus
Chap. 1: Digital Logic Circuits (skip but need to be studied)
• Logic Gates, • Boolean Algebra
• Map Simplification, • Combinational Circuits
• Filp-Flops, • Sequential Circuits
Chap. 2: Digital Components (skip but need to be studied)
• Integrated Circuits, • Decoders, • Multiplexers
• Registers, • Shift Registers, • Binary Counters
• Memory Unit
Chap. 3: Data Representation
• Data Types, • Complements
• Fixed Point Representation
• Floating Point Representation
• Other Binary Codes, • Error Detection Codes

5. Chap. 4: Register Transfer and Microoperations
• Register Transfer Language, • Register Transfer
• Bus and Memory Transfers
• Arithmetic Microoperations
• Logic Microoperations, • Shift Microoperations
• Arithmetic Logic Shift Unit
Chap. 5: Basic Computer Organization and Design
• Instruction Codes, • Computer Registers
• Computer Instructions, • Timing and Control
• Instruction Cycle,
• Memory Reference Instructions
• Input-Output and Interrupt
• Complete Computer Description
• Design of Basic Computer
• Design of Accumulator Logic

6. Chap. 6: Programming the Basic Computer
• Machine Language, • Assembly Language
• Assembler, • Program Loops
• Programming Arithmetic and Logic Operations
• Subroutines, • Input-Output Programming
Chap. 7: Microprogrammed Control
• Control Memory, • Sequencing Microinstructions
• Microprogram Example, • Design of Control Unit
• Microinstruction Format
Chap. 8: Central Processing Unit
• General Register Organization
• Stack Organization, • Instruction Formats
• Addressing Modes
• Data Transfer and Manipulation
• Program Control
• Reduced Instruction Set Computer
Midterm Exam

7. Chap. 9: Pipeline and Vector Processing
• Parallel Processing, • Pipelining
• Arithmetic Pipeline, • Instruction Pipeline
• RISC Pipeline, • Vector Processing
Chap. 10: Computer Arithmetic (skip)
• Arithmetic with Signed-2's Complement Numbers
• Multiplication and Division Algorithms
• Floating-Point Arithmetic Operations
• Decimal Arithmetic Unit
• Decimal Arithmetic Operations
Chap. 11: Input-Output Organization
• Peripheral Devices, • Input-Output Interface
• Asynchronous Data Transfer, • Modes of Transfer
• Priority Interrupt, • Direct Memory Access

8. Chap. 12: Memory Organization
• Memory Hierarchy, • Main Memory
• Auxiliary Memory. • Associative Memory
• Cache Memory, • Virtual Memory
Chap. 13: Multiprocessors ()
• Characteristics of Multiprocessors
• Interconnection Structures
• Interprocessor Arbitration
• Interprocessor Communication/Synchronization
• Cache Coherence
Final Exam

9. Homeworks HW#1 (Ch1) HW#2 (Ch2) P.1-3, 1-7, 1-9, 1-15, 1-17, 1-20
Due by 3/24/2015
HW#2 (Ch2)
P.2-3, 2-7, 2-14, 2-19, 2-23
Due by 3/26/2015