1. Instruction Set Architecture & Design
CSE 241
Computer Engineering (1)
هندسة الحاسبات (1)
Lecture # 5
Ch. 3
Instruction Set Architecture & Design
Dr. Tamer Samy Gaafar
Dept. of Computer & Systems Engineering

2. Course Web Page http://www.tsgaafar.faculty.zu.edu.eg

3. Instruction Set Architecture & Design

4. Machine Instruction Characteristics
Outline
Machine Instruction Characteristics
Elements of machine instructions, instruction representation, number of Addresses, … etc.
Types of Operands
Numbers, characters, logical data
Types of Operations

5. Instruction Cycle State Diagram

6. Elements of an instruction
Instructions
Instruction set
Complete collection of instructions that are understood by a CPU, i.e., the set of all machine instructions.
Instructions are represented in a binary form (machine language), or a symbolic form (assembly language).
Elements of an instruction
Operation code (op code)
Do this … (e.g., ADD, I/O).
Source operand reference
To this …
Result operand reference
Put the answer here …
Next instruction reference
When you have done that, do this next ...
Usually implicit (from PC).
Immediate: value.
Main memory: address.
CPU register: register number. Implicit if one register exists.
I/O device: I/O module & device. MM address if memory-mapped I/O. 2

7. Instruction Representation
Within computer, each Instruction is represented by a sequence of bits, divided into fields.
During the execution phase, an instruction is read from the IR register.
CPU extracts the data from these fields to perform the required operation.
For programmers, a symbolic representation is used.
Opcodes  mnemonics, e.g., ADD, SUB, LOAD.
Operands  symbolic names, e.g., Y = 514.
Example: ADD R1, Y 5

8. Instruction Types Data processing Data storage Data movement
Arithmetic and logic instructions.
Arithmetic: computations (processing) on numeric data.
Logic: operate on the bits of a word (any data type).
Data storage
Memory instructions.
Data movement
I/O instructions.
Program flow control
Test and branch instructions. 6

9. Number of Addresses (1)
What is the maximum number of addresses would be needed in an instruction?
“addresses” here means “explicit operand references”.
Arithmetic & logic instructions would need the most # of addresses.
Arithmetic & logic operations are either unary (one operand) or binary (two operands).
Two addresses are needed to reference operands.
One more address to store the result.
One for next instruction (usually implicit).
Most instructions are one-, two-, or three-operand. 7

10. Program to Execute: Y = (A–B)/(C+D×E)
3-address instructions
1-address instructions
2-address instructions
MPY D, E would alter D 10

11. Number of Addresses (2) 3 addresses 2 addresses
Operand 1, Operand 2, Result
a = b + c;
Needs very long words to hold everything.
2 addresses
One address doubles as operand and result
a = a + b
Reduces length of instruction 8

12. Number of Addresses (3) 1 address 0 (zero) addresses
Implicit second address
Usually a register (accumulator: AC)
Common on early machines
0 (zero) addresses
All addresses implicit
Uses a stack
Last-in-first-out set of locations.
Top of stack.
e.g. push a
push b
add
pop c
c = a + b
push 3
pop a
pop b
pop c
Top of stack
push 5 3
Top of stack 19
Top of stack
Stack
(Last-in first-out)
745 5
Top of stack . . . 9

13. Types of Operands Addresses Numbers Characters Logical Data
A form of data.
Unsigned integers.
Numbers
Characters
IRA (ASCII): 7-bit code. An 8th bit may be used for parity.
Logical Data
Bit-oriented view of data (true/false).
Store an array of logical data, manipulate bits of a data item. 14

14. Transfer of Control (Sequencing)
Types of Operations
Data Movement
Arithmetic
Logical
I/O
Transfer of Control (Sequencing) 18

15. Instruction must specify:
1. Data Transfer
Instruction must specify:
Location of source operand.
Location of destination operand.
Location of operand and amount of data could be specified as part of opcode or operand fields:
Memory.
Register.
Top of stack. 19

16. 1. Data Transfer – Common Operations19

17. 1. Data Transfer – CPU Actions
In terms of CPU action, data transfer operations are perhaps the simplest type.
If both source and destination are registers:
Issue a command to transfer data from a register to another, which is completely internal.
If one or both operands are in memory:
Calculate memory address(es) of operand(s).
Translate adress(es) from virtual to physical.
Check the cache.
If miss, issue a command to the memory module. 19

18. Types of Operations Data Transfer Arithmetic Logical I/O
Transfer of Control 18

19. Add, Subtract, Multiply, Divide
2. Arithmetic
Add, Subtract, Multiply, Divide
Signed Integer (fixed-point) numbers
Floating point numbers.
May include
Increment (a++)
Decrement (a--)
Negate (-a)
Absolute (if a<0 then -a else a)
May involve data transfer
Desired arithmetic operation is performed by ALU 20

20. 3. Logical – Common Operations21

21. 3. Logical – AND, OR, NOT, XOR, …
To manipulate individual bits  bit twiddling.
Could be used for bit masking:
Reset a specific group of bits:
Operation: AND
Mask: 0 for each bit to be reset and 1 otherwise.
Set a specific group of bits:
Operation: OR
Mask: 1 for each bit to be set and 0 otherwise.
Toggle a specific group of bits:
Operation: XOR
Mask: 1 for each bit to be inverted and 0 otherwise. 21

22. 3. Logical – Shift and Rotate Operations
Logical right shift
Logical left shift
Arithmetic right shift
Arithmetic left shift
Right rotate
Left rotate

23. May be done using data movement instructions (memory-mapped).
4. Input/Output
May be done using data movement instructions (memory-mapped).
May be using specific i/o instructions.
May be done by a separate controller (DMA). 23

24. 4. Input/Output – Common Operations23