2. Alexei O. Orlov Department of Electrical Engineering University of Notre Dame, IN, USA Temperature dependence of locked mode in a Single-Electron Latch

3. Notre Dame research team Experiment: – Dr. Ravi Kummamuru – Prof. Greg Snider – Prof. Gary Bernstein Theory – Mo Liu – Prof. Craig Lent Supported by DARPA, NSF, ONR, and W. Keck Foundation

4. Outline of presentation  Introduction  Power Gain in nanodevices  Clocked single-electron devices  Bistability for memory  Experiment and simulations  Temperature dependence of bistability and hysteresis loop size  Summary and conclusions

5. Problems shrinking the current-switch Electromechanical relay Vacuum tubes Solid-state transistors CMOS IC New idea Valve shrinks also – hard to get good on/off Current becomes small - resistance becomes high Hard to turn next switch Charge becomes quantized Power dissipation threatens to melt the chip! Quantum Dots

6. How to make a power amplifier using quantum wells? 0 1 0 energy x Clock Small Input Applied Clock Applied Input Removed but Information is preserved! 0 Keyes and Landauer, IBM Journal of Res. Dev. 14, 152, 1970

7. Quantum-dot Cellular Automata A cell with 4 dots Tunneling between dots Polarization P = +1 Bit value “1” 2 extra electrons Polarization P = -1 Bit value “0” Neighboring cells tend to align. Coulomb coupling Current switch Charge configuration Old Paradigm New Paradigm

8. Clocking for single-electron logic: Quantum-dot Cellular Automata and Parametrons  Clocked QCA : Lent et al., Physics and Computation Conference, Nov. 1994  Parametron: Likharev and Korotkov, Science 273, 763, 1996 Metallic or molecular dots (parametron): Clocking achieved by modulating energy of third state directly P= +1P= –1Null State Semiconductor dots (QCA): Clocking achieved by modulating barriers between dots

9. NanoDevices Group 1 st evaporation 2 nd evaporation Resulting Pattern Oxidation Metal “dot” fabrication process Aluminum Tunnel junction technology combining E beam lithography with a suspended mask technique and double angle evaporation Oxide layer between two layers of Aluminum forms tunnel junctions.

10. Ultra-sensitive electrometers for QCA  Sub-electron charge detection is needed  Single-electron transistors are the best choice SET electrometers can detect «1% of elementary charge.

11. Single-Electron Latch: a Building Block Layout And Measurement Setup +V IN ~ A VgVg SEM Micrograph of SE latch MTJ D3 D1 D2 +V IN 1m1m Electrometer MTJ=multiple tunnel junction The third, middle dot acts as an adjustable barrier for tunneling

12. (0,0,0) neutral Animated three-dot SE latch operation + (0,0,0)  (0,-1,1) switch to “1” - V CLK - V IN + V IN V CLK =0 (0,-1,1) storage of “1”(0,0,0)  (0,-1,1) back to neutral D1D1 D3D3 D2D2 - V IN =0 + V IN =0  Clock signal >> Input signal  Clock supplies energy, input defines direction of switching  Three states of SE latch: “0”, “1” and “neutral” Bit can be detected

13. Experiment: Single-Electron Latch in Action  Weak input signal sets the direction of switching  Clock drives the switching  Bistable Switch + Inverter demonstrated  Memory Function demonstrated D1 D2 D3 E1 +V IN -V IN V CLK Latch SET electrometer Switch to “1” Hold “1” Switch to “neutral” Switch to “0” Hold “0” Switch to “neutral” Input Clock “High” T=100 mK

14. How temperature affects bistability? region suitable for latch operation Binary “1” Binary “0” 2 level switch with memory = there must be a Hysteresis SEL operates fine @ T=100 mK Charging energy consideration E C ≥10 kT, E C =0.8 meV (9.3 K) What is the highest operating temperature? Zero K calculations were performed before –Korotkov et al. (1998) –Toth et al. (1999)

15. Sweeping input bias 0 0 0 ECEC -e  V 0 eVeV ECEC ECEC ECEC 0 eVeV ECEC ECEC 0 eVeV ECEC ECEC -e 2  C in 0  e 2  C in ECEC 2.5 5 0 V IN (mV) V D1 (mV) Equilibrium Border V CLK =0 V IN - V IN + D1 ECEC -0 0 00 ECEC -e  V 0 eVeV ECEC ECEC ECEC 0 eVeV ECEC ECEC 0 eVeV ECEC ECEC -e 2  C in 0  e 2  C in ECEC Assume Coulomb barrier is the same for hops between adjacent dots

16. How bistabile behavior scales with temperature? Thermal energy surmounts Coulomb barrier Hysteresis loop shrinks and then disappears ECEC e×(-  V) 0 e×(+  V) ECEC kT

17. Hysteresis loop change with Temperature T=90 mK T=160 mK T=320 mK Calculations performed using time dependent master equation for orthodox theory of Coulomb blockade

18. Bistability area vs kT Relative loop size  V/V 0 Calculations represent ensemble averaging = averaging over multiple scans At T >300 mK no bistability is observed Bistability disappears for kT ~ W/30, where W is Coulomb barrier At T=>0 (  V/V 0 )>1, it means that system becomes multistable V0V0 VV

19. Summary & Conclusions  Temperature dependence of bistable switching in Single- Electron Latch is studied experimentally  Theoretical calculations using time-dependent master equation are performed  Hysteresis loop size vs temperature is studied  Bistability disappears as kT reaches E C /30  For 300K operation W ~ 30 kT≈1 eV  The real world applications can be implemented using “molecular assembly line” once technology becomes available VcVc Metal-dot Single-Electron Latch Molecular Single-Electron Latch

20. Measured and calculated charging diagrams Charging diagram is a 3D plot (gray scale map) of dot potential vs input and clock bias White is positive, black is negative Calculated data are superimposed with measured

22. Single-Electron Latch in Action Two electrometers are used Both are connected to end dots