1. Minimum-Buffered Routing of Non- Critical Nets for Slew Rate and Reliability Control Supported by Cadence Design Systems, Inc. and the MARCO Gigascale Silicon Research Center C. Alpert (IBM) A. B. Kahng, B. Liu, I. Măndoiu (UCSD) A. Zelikovsky (GSU) http://vlsicad.ucsd.edu

2. Outline Motivation Previous Work Formulation Our contributions  Buffering a given tree  Simultaneous tree construction and buffering Experimental results Summary and research directions

3. Bounded load capacitance is achieved by buffer insertion Motivation Timing analysis requires electrical correctness  Load caps and slew times must be within range of lookup tables, else timing analysis can’t be trusted! Electrical correctness is guaranteed by bounding load capacitance Gate delay Input slew time Load cap Output slew time Input slew time Load cap Slew time control needed for all nets, including nets with tens of thousands of sinks (SE, Reset,...)

4. Previous Work on Buffer Insertion Fanout optimization during synthesis  Berman et al. 89,... Delay optimization  van Ginneken 90: dynamic programming  Lillis et al. 96 : simultaneous buffering and wiresizing  Alpert et al. 98 : simultaneous noise and delay optimization Slew time and skew control  Tellez-Sarrafzadeh 97 Our differences  Post-layout stage, not synthesis stage  Buffering for electrical correctness, not for delay optimization – in fact, before delay optimization  Simultaneous tree construction and buffering  Polarity consideration

5. Formulation - Non-Inverting Case Given: net N with  Source r  Sinks S, each with Input capacitance C s Find: buffered routing tree for N with min number of buffers while satisfying  Load cap constraint: The source and each buffer drives  C U cap C s2 C s1 r  CU CU CUCU  Per-unit length wire capacitance C w  A single buffer type, with Non-inverting type Input capacitance C b Load cap upper-bound C U

6. C s1 C s2 r Formulation – Inverting Case Given: net N with  Source r,  Sinks S, each with Input capacitance C s  Unit length wire capacitance C w  A single buffer type, with Input capacitance C b Load cap upper-bound C U Find: buffered routing tree for N with min number of buffers while satisfying  Load cap constraint: The source and each buffer drives  C U cap  C U CUCU + + Inverting type Signal polarity  Sink polarity constraints

7. Our Contributions New problem formulations and contexts  Buffering for electrical correctness, pre-timing analysis  Simultaneous tree construction and buffering  Polarity constraints 4+  2+  Approximation Simultaneous tree construction and buffering Buffering of a given tree Inverting Non- inverting Dynamic programming Cut&Connect Clustering Greedy HeuristicOptimal OPEN Hardness results  Buffering RSMT is not always optimum  Optimum interconnect not always on Hanan grid  NP-hard to approximate within a ratio of 2-  Six algorithms

8. Outline Motivation Previous Work Formulation Our contributions  Buffering a given tree  Simultaneous tree construction and buffering Experimental results Summary and research directions

9. CsCs C s1 p C s2 L (p,s1) C w + C s1 + L (p,s2) C w + C s2 > C U Non-Inverting Buffering of a Given Tree Linear time greedy algorithm  Extension of a node-weighted tree partition algorithm by Kundu-Misra79  A different algorithm was given by Tellez-Sarrafzadeh97 Insert buffers bottom-up such that each buffer drives largest possible load cap  C U ? L (b1,s) C w + C s = C U b1b1 L (b2,b1) C w + C b1 = C U b2b2

10. A vertex is critical if c(T p )>C U and c(T u )<C U  child u of p A child u is heaviest if c(T u ) + c(u,p) > c(T v ) + c(v,p)  other child v of p Find a critical vertex p by a post-order traversal of T Find a heaviest child u of p Insert a buffer b on edge (u,p) such that c(u,b) = min{C U -c(T u ), c(u,p)} Recursively find an optimum buffering B’ of T\T b C s1 s1s1 C s2 s2s2 Non-inverting Buffering of a Given Tree L (s1,b1) C w + C s1 = C U b1b1 p CUCU

11. C s2 s2s2 Non-Inverting Buffering of a Given Tree A vertex is critical if c(T p )>C U and c(T u )<C U  child u of p A child u is heaviest if c(T u ) + c(u,p) > c(T v ) + c(v,p)  other child v of p Find a critical vertex p by a post-order traversal of T Find a heaviest child u of p Insert a buffer b on edge (u,p) such that c(u,b) = min{C U -c(T u ), c(u,p)} Recursively find an optimum buffering B’ of T\T b b1b1 p L (s2,b2) C w + C s2 = C U b2b2 CUCU

12. Non-Inverting Buffering of a Given Tree A vertex is critical if c(T p )>C U and c(T u )<C U  child u of p A child u is heaviest if c(T u ) + c(u,p) > c(T v ) + c(v,p)  other child v of p Find a critical vertex p by a post-order traversal of T Find a heaviest child u of p Insert a buffer b on edge (u,p) such that c(u,b) = min{C U -c(T u ), c(u,p)} Recursively find an optimum buffering B’ of T\T b b1b1 p b2b2 (L (b1,p) +L (b2,p) )C w + 2C b > C U b3b3  C U L (b1,p) C w + C b  L (b2,p) C w + C b Can be implemented to run in linear time

13. Inverting Buffering of a Given Tree + 0.5C U -  - (0.5C U +  ) - -  C w = C b = 0 Greedy buffering is not optimal + 0.5C U -  - (0.5C U +  ) - 

14. For each node u of T in post-order traversal  Insert buffers in T p driving load cap = C U if possible  Try all the possibilities and insert 0,1 or 2 buffers at head of each branch (9 cases for binary tree)  For each polarity, find the feasible buffering of T u with minimum number of buffers, breaking ties by minimum residual capacitance At root, choose solution with min number of buffers between the two possible polarities Insert buffers in top-down order Inverting Buffering of a Given Tree Linear runtime for bounded-degree trees Dynamic programming algorithm

15. Outline Motivation Previous Work Formulation Our contributions  Buffering a given tree  Simultaneous tree construction and buffering Experimental results Summary and research directions

16. Hardness Results Optimum buffering of optimum Steiner tree is not always optimum C U =14, C s =C b =0 6 4 5 12 source 6 5 3 14 source

17. Hardness Results Optimum buffered tree may not be on the Hanan grid C U =8, C s =C b =1 3 6 2 source 1 7 3 7 1 1 7

18. Hardness Results NP-hard to approximate within a ratio of 2 -   Proof by reduction from RSMT problem RSMT: Does there exist a Steiner min tree over terminals S of length  k ? Given C b = 0, C w = 1, C U = k, does there exist a buffered routing tree over terminals S with 1 buffer ? Any 2 -  approximation algorithm will solve RSMT problem in polynomial time  Impossible (unless P=NP) !

19. Theorem: The problem can be approximated within a ratio of 2 (1 +  ) for any  > 1 / (C U / C b - 2) for non-inverting buffer type    1 : PTAS by S. Arora J. ACM ‘98  Optimum number of buffers  Every buffer inserted by the algorithm drives a load of at least C U /2 Theoretically best-possible result  NP-hard to approximate within a ratio of 2 –  Approximation – Non-inverting case Construct an  -approximate Steiner tree T Transform T into a binary tree Apply the greedy algorithm to T

20.  Construct an  -approximate Steiner tree T  Transform T into a binary tree  Apply the greedy algorithm on T  Replace each buffer b by 2 inverting buffers, each driving a copy of T b (one copy for “+’’ sinks, one copy for “-” sinks) Approximation – Inverting case Theorem: The problem can be approximated within a ratio of 4(1+  ) for inverting buffer type Approximation ratio is not known to be tight + - + -

21. Heuristic: Cut and Connect  Construct a Steiner minimum tree T C U = 8, C b = C s = 0 4 3 2 6  Apply the greedy algorithm to T  For each buffer b driving < C U cap

22. C U = 8, C b = C s = 0 4 3 Heuristic: Cut and Connect  Construct a Steiner minimum tree T  Apply the greedy algorithm to T  For each buffer b driving < C U cap 4 3 2  Cut a neighboring subtree and reconnect it under b if possible

23. C U = 8, C b = C s = 0 4 3 Heuristic: Cut and Connect  Construct a Steiner minimum tree T  Apply the greedy algorithm to T  For each buffer b driving < C U cap  Cut a neighboring subtree and reconnect it under b if possible 1 1 4 3 1 3 3 2 6  Relocate b downstream if necessary

24. Heuristic: Clustering  Construct a Steiner min tree T C U = 10, C b = C s = 0 7 4 3 1 1 1 1  While c(T) > C U  Insert a buffer b above critical node v with max c(T v ) C U

25. Heuristic: Clustering  Construct a Steiner min tree T  While c(T) > C U  Insert a buffer b above critical node v with max c(T v ) C U  Connect closest neighboring sink under b, if possible C U = 10, C b = C s = 0 7 4 3 4

26. Heuristic: Clustering  Construct a Steiner min tree T  While c(T) > C U  Insert a buffer b above critical node v with max c(T v ) C U  Connect closest neighboring sink under b, if possible  Replace T b by b as a sink C U = 10, C b = C s = 0 4 4 2  Re-construct Steiner min tree T

27. Heuristic: Clustering  Construct a Steiner min tree T  While c(T) > C U  Insert a buffer b above critical node v with max c(T v ) C U  Connect closest neighboring sink under b, if possible  Replace T b by b as a sink  Re-construct Steiner min tree T C U = 10, C b = C s = 0 7 4 4 2 3 7 4 3 1 1 1 1 Differences with Cut&Connect  Re-construct Steiner tree after each buffer insertion  Cut a sink instead of a subtree

28. Outline Motivation Previous Work Formulation Our contributions  Buffering a given tree  Simultaneous tree construction and buffering Experimental results Summary and research directions

29. Experimental Results GreedyCut&ConnectClusteringLower Bound CUCU #bufRun time #bufRun time #bufRun time #buf 5008066.5977839.1729890.01571 10003886.5837458.6350424.8283 20001916.5815389.0171208.8138 4000956.5792147.684103.668 8000456.5744113.84249.323 Industry design with 34K terminals, C w = 0.177fF/um, C b = 37.5fF Runtimes in seconds on a Ultra-60 Lower Bound: (c(T) – C U ) / (C U – C b )

30. Outline Motivation Previous Work Formulation Our contributions  Buffering a given tree  Simultaneous tree construction and buffering Experimental results Summary and research directions

31. Summary and Research Directions New formulation and context for minimum buffering Methods apply to nets with up to tens of thousands of sinks  savings of up to 12% in the number of inserted buffers  Reference implementations in MARCO GSRC Bookshelf: http://vlsicad.ucsd.edu/GSRC/bookshelf/Slots/Buffer Ongoing research  Buffering with slew and buffer skew constraints (SASIMI’01)  Improved heuristics for simultaneous tree construction and buffering with inverting buffer type  Buffer libraries (not just single buffer type)  Multi-constraints, e.g., load cap and fanout upper bounds

32. Thank you !

33. Solution Quality An industry design with 22000 terminals CUCU Number of buffers normalized by lower bound

34. Efficiency An industry design with 22000 terminals CUCU Runtime (sec)