2. 1 Microprocessor Systems and Instrumentation SOE2121

3. 2 Microprocessor Systems and Instrumentation SOE2121 Number Systems

4. 3 Machine code: 0101001101010010101001001010100101001001000011 1100010100110010010100101000100010010101010010 0100101001010000101010101001011100010111000100 1010100010100100010010100101010010010100010001 0010100010101001001010010100001010101010010111 0001011100010010101000101001000100101001010100 1001010001000100101000101010010010100101000010 1010101001011100010111000100101010001010010001 0010100101010010010100010001001100100101000100 0100110010010100010001001100100101000100010011 0010010100010001001010001010100100101001010000 1010101010010111000101110001001010100010100100 0100101001010100100101000100010010100010101000 1111100100101001001010010100001000100010010111

5. 4 Machine code: 01010001 01010010 10100100 10101001 01001001 00001111 00010100 11001001 01001010 00100010 01010101 00100100 10100101 00001010 10101001 01110001 01110001 00101010 00101001 00010010 10010101 00100101 00010001 00101000 10101001 00101001 01000010 10101010 01011100 01011100 01001010 10001010 01000100 10100101 01001001 01000100 01001010 00101010 01001010 01010000 10101010 10010111 00010111 00010010 10100010 10010001 00101001 01010010 01010001 00010011 00100101 00010001 00110010 01010001 00010011 00100101 00010001 00110010 01010001 00010010 10001010 10010010 10010100 00101010 10100101 11000101 11000100 10101000 10100100 01001010

6. 5 Machine code: DB 33 37 56 5E 4B 67 85 44 34 77 62 A3 D9 FF 03 74 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 76 F5 E2 AB 72 97 43...

7. 6 The Decimal System Decimal Number 38O7: 3 x 1OOO ( = 1O 3 ) 3OOO 8 x 1OO ( = 1O 2 ) 8OO O x 1O ( = 1O 1 ) OO 7 x 1 ( = 1O O ) 7 ---- Total: 38O7

8. 7 The Binary System Binary Number 1O11: 1 x 8 ( = 2 3 ) 8 O x 4 ( = 2 2 ) O 1 x 2 ( = 2 1 ) 2 1 x 1 ( = 2 O ) 1 -- Total: 11

9. 8 The Binary System Bit value: 128 64 32 16 8 4 2 1 Power of 2: 2 7 2 6 2 5 2 4 2 3 2 2 2 1 2 O Number: 1 0 0 1 0 1 1 0

10. 9 The Decimal and Binary Systems Decimal Number 38O7: 3 x 1OOO ( = 1O 3 ) 3OOO 8 x 1OO ( = 1O 2 ) 8OO O x 1O ( = 1O 1 ) OO 7 x 1 ( = 1O O ) 7 ---- Total: 38O7 Binary Number 1O11: 1 x 8 ( = 2 3 ) 8 O x 4 ( = 2 2 ) O 1 x 2 ( = 2 1 ) 2 1 x 1 ( = 2 O ) 1 -- Total: 11

11. 10 The Hexadecimal System Hexadecimal Number 21AF: (Base 16) 2 x 4O96 ( = 16 3 ) 8192 1 x 256 ( = 16 2 ) 256 A x 16 ( = 16 1 ) 16O F x 1 ( = 16 O ) 15 ---- Total: 8623

12. 11 Number Systems Decimal Numbers (Base 1O) 1O symbols: O 1 2 3 4 5 6 7 8 9 Binary Numbers (Base 2) 2 symbols: O 1 Hexadecimal Numbers(Base 16) 16 symbols: O 1 2 3 4 5 6 7 8 9 A B C D E F

13. 12 Brain Exercises (Neurobics) * Binary counting on fingers (and toes after ?) * Binary Arithmetic - + Addition - Subtraction / Division * Multiplication * Hexadecimal Arithmetic - + Addition - Subtraction / Division * Multiplication

14. 13 HEX BINARY DECIMAL O OOOO O 1 OOO1 1 2 OO1O 2 3 OO11 3 4 O1OO 4 5 O1O1 5 6 O11O 6 7 O111 7 8 1OOO 8 9 1OO1 9 A 1O1O 1O B 1O11 11 C 11OO 12 D 11O1 13 E 111O 14 F 1111 15

15. 14 Converting between Binary and Hexadecimal Binary: 0010 1100 32+8+4=44 Hex: 2 C 32+12=44

16. 15 Converting between Binary and Hexadecimal 111O1OO111O1 = 111O 1OO1 11O1 E 9 D 12AB = 1 2 A B OOO1 OO1O 1O1O 1O11

17. 16 Number conversions - Hex to Decimal: Convert 1234 hex to decimal: 16 3 16 2 16 1 16 0 4096 256 16 1 1 2 3 4 1 x 4096 = 4096 2 x 256 = 512 3 x 16 = 48 4 x 1 = 4 + -----

18. 17 Number conversions - Decimal to Binary: Convert 1234 decimal to binary: 2 10 1024 - 1 1234 - 1024 = 210 2 9 512 - 0 2 8 256 - 0 2 7 128 - 1 210 - 128 = 82 2 6 64 - 1 82 - 64 = 18 2 5 32 - 0 2 4 16 - 118 - 16 = 2 2 3 8 - 0 2 2 4 - 0 2 1 2 - 1 2 - 2 = 0 2 0 1 - 0 So 1234 decimal = 100 1101 0010 binary

19. 18 Number conversions - Binary to Hex: eg binary number 11010011101011010 First divide up FROM THE RIGHT into groups of 4 bits: 1 1010 0111 0101 1010 Then use the hex table (or better your brain) to write the hex values: 1 1010 0111 0101 1010 1 A 7 5 A Note: learn 0-9 and remember A=1010 and C=1100

20. 19 HEX BINARY DECIMAL O OOOO O 1 OOO1 1 2 OO1O 2 3 OO11 3 4 O1OO 4 5 O1O1 5 6 O11O 6 7 O111 7 8 1OOO 8 9 1OO1 9 A 1O1O 1O B 1O11 11 C 11OO 12 D 11O1 13 E 111O 14 F 1111 15

21. 20 Negative Numbers - Twos Complement form: To form a negative number, for example -3, first invert (ones complement) the positive number of the same magnitude (+3), then add one: 00000011+3 invert to give 11111100ones complement 00000001+add one -------- 11111101result is -3 (Hex FD)

22. 21 Negative Numbers: Most negative number -128 Most positive number +127 Note: bit 7 carries the sign information 1=negative 0=positive 7 0 00000001 11111110

23. 22 Negative Numbers: 0111 11117F+127 0111 11107E+126 | 0000 001103+3 0000 001002+2 0000 000101 +1 0000 0000000 1111 1111FF-1 1111 1110FE-2 1111 1101FD-3 | 1000 000181-127 1000 000080-128

24. 23 Signed and Unsigned Arithmetic: Why does it work for both unsigned numbers (0 to 255) and signed numbers (-128 to +127)? UnsignedData Signed 253 FD -3 1 01+ +1 ------ --- 254 FE -2

25. 24 Binary Coded Decimal: Each decimal digit is encoded as a 4 bit binary number: O OOOO 1 OOO1 2 OO1O 3 OO11 4 O1OO 5 O1O1 6 O11O 7 O111 8 1OOO 9 1OO1 eg decimal 42 0100 0010 4 2 What is this value in Hexadecimal? (Note 42 in binary is 0010 1010 Hex 2A)

26. 25 Binary Coded Decimal: Range of BCD numbers in one byte 00 - 99 Reading a BCD number in hex gives the decimal value

27. 26 HEX BINARY DECIMAL O OOOO O 1 OOO1 1 2 OO1O 2 3 OO11 3 4 O1OO 4 5 O1O1 5 6 O11O 6 7 O111 7 8 1OOO 8 9 1OO1 9 A 1O1O 1O B 1O11 11 C 11OO 12 D 11O1 13 E 111O 14 F 1111 15

28. 27 ASCII Table: MSD->0 1 2 3 4 5 6 7 LSD 0 NUL DLE SP 0 @ P ` p 1 SOH DC1 ! 1 A Q a q 2 STX DC2 " 2 B R b r 3 ETX DC3 # 3 C S c s 4 EOT DC4 $ 4 D T d t 5 ENQ NAK % 5 E U e u 6 ACK SYN & 6 F V f v 7 BEL ETB ' 7 G W g w 8 BS CAN ( 8 H X h x 9 HT EM ) 9 I Y i y A LF SUB * : J Z j z B VT ESC + ; K [ k { C FF FS, < L ` l | D CR GS - = M ] m } E SO RS. > N ^ n ~ F SI VS / ? O _ o DEL

29. 28 The Byte 7 6 5 4 3 2 1 0 1 Byte = 8 bits Contains one of 256 possible patterns OOOOOOOO OOOOOOO1 OOOOOO1O OOOOOO11 OOOOO1OO | 11111111 Range $OO-$FF = O to 255

30. 29 The Byte 7 6 5 4 3 2 1 0 Most Significant Bit Least Significant Bit

31. 30 Which is Most Significant? A typical lecturer’s salary might be: £93,878 Most Significant Digit Least Significant Digit

32. 31 Hexadecimal Representation: Binary Hex Meaning Value 0100 0001 41 Unsigned Binary 65 Decimal 0100 0001 41 ASCII code A 0100 0001 41 BCD number 41 Decimal 1111 1111 FF Signed Binary -1 Decimal 1111 1111 FF Unsigned Binary 255 Decimal 1010 0101 A5 Opcode LDA 7 6 5 4 3 2 1 0

33. 32 Brain Exercises (Neurobics) * Binary counting on fingers (and toes after ?) * Binary Arithmetic - + Addition - Subtraction / Division * Multiplication * Hexadecimal Arithmetic - + Addition - Subtraction / Division * Multiplication

34. 33 Introduction Load and Store Transfer

35. 34 Not Recommended Book: 65O2 Assembly Language Programming by L A Leventhal Pub: Osborne/McGraw-Hill

36. 35 Assembly Language Advantages: Fastest possible program (on a particular processor) Smallest size program (cheaper ROM) Smallest RAM requirement (cheaper RAM) Disadvantages: Much longer software development time Programs more difficult to debug Programs not portable

37. 36 Assembly Language: When is it used? MASS PRODUCTION Where the lowest possible production cost is required and longer more expensive software development time is acceptable. eg microwave oven, mobile phone HIGH SPEED APPLICATIONS Where a high level language would not respond quickly enough. eg high speed data acquisition system Notes: faster processors, critical bits in assembler, smallest physical size eg Pacemaker where power consumption is also a consideration.

38. 37 Microprocessor Systems and Instrumentation SOE2121 Number Systems

39. 38 Machine code: 0101001101010010101001001010100101001001000011 1100010100110010010100101000100010010101010010 0100101001010000101010101001011100010111000100 1010100010100100010010100101010010010100010001 0010100010101001001010010100001010101010010111 0001011100010010101000101001000100101001010100 1001010001000100101000101010010010100101000010 1010101001011100010111000100101010001010010001 0010100101010010010100010001001100100101000100 0100110010010100010001001100100101000100010011 0010010100010001001010001010100100101001010000 1010101010010111000101110001001010100010100100 0100101001010100100101000100010010100010101000 1111100100101001001010010100001000100010010111

40. 39 Machine code: 01010001 01010010 10100100 10101001 01001001 00001111 00010100 11001001 01001010 00100010 01010101 00100100 10100101 00001010 10101001 01110001 01110001 00101010 00101001 00010010 10010101 00100101 00010001 00101000 10101001 00101001 01000010 10101010 01011100 01011100 01001010 10001010 01000100 10100101 01001001 01000100 01001010 00101010 01001010 01010000 10101010 10010111 00010111 00010010 10100010 10010001 00101001 01010010 01010001 00010011 00100101 00010001 00110010 01010001 00010011 00100101 00010001 00110010 01010001 00010010 10001010 10010010 10010100 00101010 10100101 11000101 11000100 10101000 10100100 01001010

41. 40 Machine code: DB 33 37 56 5E 4B 67 85 44 34 77 62 A3 D9 FF 03 74 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 99 55 64 EE E7 F2 83 82 99 55 76 F5 E2 AB 72 97 43...

42. 41 HEX BINARY DECIMAL O OOOO O 1 OOO1 1 2 OO1O 2 3 OO11 3 4 O1OO 4 5 O1O1 5 6 O11O 6 7 O111 7 8 1OOO 8 9 1OO1 9 A 1O1O 1O B 1O11 11 C 11OO 12 D 11O1 13 E 111O 14 F 1111 15

43. 42 The Byte 7 6 5 4 3 2 1 0 1 Byte = 8 bits Contains one of 256 possible patterns OOOOOOOO OOOOOOO1 OOOOOO1O OOOOOO11 OOOOO1OO | 11111111 Range $OO-$FF = O to 255

44. 43 The Byte 7 6 5 4 3 2 1 0 Most Significant Bit Least Significant Bit

45. 44 Which is Most Significant? A typical lecturer’s salary might be: £93,878 Most Significant Digit Least Significant Digit

46. 45 The Byte 7 6 5 4 3 2 1 0 1 Byte = 8 bits Contains one of 256 possible patterns OOOOOOOO OOOOOOO1 OOOOOO1O OOOOOO11 OOOOO1OO | 11111111 Range $OO-$FF = O to 255

47. 46 Hexadecimal Representation: Binary Hex Meaning Value 0100 0001 41 Unsigned Binary 65 Decimal 0100 0001 41 ASCII code A 0100 0001 41 BCD number 41 Decimal 1111 1111 FF Signed Binary -1 Decimal 1111 1111 FF Unsigned Binary 255 Decimal 1010 0101 A5 Opcode LDA 7 6 5 4 3 2 1 0

48. 47 6502 Programmer’s Model 00000001 NV-BDIZC A X PC SP PS Y 7 0 15 8 FFFF 0200 01FF 0100 00FF 0000 Microprocessor Memor y STACK PAGE ZERO 7 0

49. 48 Memory 65536 bytes numbered in decimal: O - 65535 in hex: OOOO - FFFF in binary: OOOO OOOO OOOO OOOO - 1111 1111 1111 1111 The number of each memory location is known as its ADDRESS 2 Bytes are required to hold an address which is 16 bits

50. 49 Instruction Formats One byte instructions: Two byte instructions: Three byte instructions: OPCODE OPERAND OPERAND

51. 50 Load and Store Instructions

52. 51 The LDA Instruction Copy the contents of memory location 8O into the A register: LDA 8O This instruction uses zero page addressing since address $8O is on page zero

53. 52 The LDA Instruction and the Instruction Set Sheet Assembly Language: LDA 8O Machine Code: A5 8O Instruction Set Sheet Entry: A5 3 Opcode: A5 Time: 3 clock cycles Length: 2 bytes

54. 53 The LDA Instruction and the Instruction Set Sheet +---------------------------------------------+ | |Immed| ABS | ZP |Effect on | | Operation |len=2|len=3|len=2|the flags:| | |OP n|OP n|OP n| NV-BDIZC | +-----+----------------+-----+-----+-----+----------+ | LDA | A := M |A9 2|AD 4|A5 3| N.....Z. | Assembly Language: LDA 8O Machine Code: A5 8O Instruction Set Sheet Entry: A5 3 Opcode: A5 Time: 3 clock cycles Length: 2 bytes

55. 54 The LDA Instruction and the Instruction Set Sheet Assembly Language: LDA 8O Machine Code: A5 8O Instruction Set Sheet Entry: A5 3 Opcode: A5 Time: 3 clock cycles Length: 2 bytes Effect on the Flags: N.....Z. N and Z changed depending on the value that is loaded The N flag becomes the sign bit (7) of the value loaded The Z flag is 1 if the value loaded is zero The Z flag is O if the value loaded is not zero

56. 55 Load and Store instructions AbsoluteZero Page LDA 1234 LDA 8O STA 1234 STA 8O LDX 1234 LDX 8O STX 1234 STX 8O LDY 1234 LDY 8O STY 1234 STY 8O

57. 56 Immediate Addressing Instruction Machine code: LDA #AA A9 AA LDX #FF A2 FF LDY #O1 AO O1

58. 57 Don’t mix these up! Zero Page: LDA OO Immediate:LDA #OO

59. 58 Transfer Instructions

60. 59 Transfer instructions: TAX Copy register A to register X The old value in X is lost Register A is not affected

61. 60 Transfer instructions: TAX TAY TXA TYA (TXS TSX) All 1 byte Long Implied Addressing 2 Clock Cycles Flags as for LDA

62. 61 Arithmetic Instructions ADC SBC

63. 62 Negative Numbers

64. 63 Negative Numbers - Twos Complement form: To form a negative number, for example -3, first invert (ones complement) the positive number of the same magnitude (+3), then add one: 00000011+3 invert to give 11111100ones complement 00000001+add one -------- 11111101result is -3 (Hex FD)

65. 64 Negative Numbers: Most negative number -128 Most positive number +127 Note: bit 7 carries the sign information 1=negative 0=positive 7 0 00000001 11111110

66. 65 Signed and Unsigned Arithmetic: Why does it work for both unsigned numbers (0 to 255) and signed numbers (-128 to +127)? UnsignedData Signed 253 FD -3 1 01+ +1 ------ --- 254 FE -2

67. 66 ADC

68. 67 Addition: CLC LDA 8O ADC 81 STA 82

69. 68 Two byte arithmetic: How do we do it in decimal? 36 25 + --- 61

70. 69 Addition and Subtraction: CLC SEC LDA 8O LDA 8O ADC 81 SBC 81 STA 82 STA 82

71. 70 Two byte arithmetic: LSB MSB First Number: Second Number:Result: 808182838485 CLC SEC LDA 8O LSBs LDA 8O LSBs ADC 82 SBC 82 STA 84 STA 84 LDA 81 MSBs LDA 81 MSBs ADC 83 SBC 83 STA 85 STA 85 Addition:Subtraction:

72. 71 Decimal Arithmetic

73. 72 6502 Programmer’s Model 00000001 NV-BDIZC A X PC SP PS Y 7 0 15 8 FFFF 0200 01FF 0100 00FF 0000 Microprocessor Memory STACK PAGE ZERO 7 0

74. 73 Decimal Arithmetic (BCD): SED SED CLC SEC LDA 8O LDA 8O ADC 81 SBC 81 STA 82 STA 82 CLD CLD Addition:Subtraction:

75. 74 Logical Instructions

76. 75 Logical Operations:

77. 76 Logical Operations: And: AND

78. 77 Logical Operations: And: AND Or: ORA

79. 78 Logical Operations: And: AND Or: ORA Exclusive Or: EOR

80. 79 AND

81. 80 The AND Instruction: LDA #A9 1O1O 1OO1 (A) AND #OF OOOO 1111 (M) --------- Result: OOOO 1OO1 Any O in the mask will clear the corresponding bit in A to O Any 1 in the mask will leave the corresponding bit in A unchanged

82. 81 OR

83. 82 The ORA Instruction: LDA #A9 1O1O 1OO1 (A) ORA #OF OOOO 1111 (M) --------- Result: 1010 1111 Any 1 in the mask will set the corresponding bit in A to 1 Any 0 in the mask will leave the corresponding bit in A unchanged

84. 83 EOR

85. 84 The EOR Instruction: LDA #A9 1O1O 1OO1 (A) EOR #OF OOOO 1111 (M) --------- Result: 1010 0110 Any 1 in the mask will invert the corresponding bit in A (so 1 becomes 0 and 0 becomes 1) Any 0 in the mask will leave the corresponding bit in A unchanged

86. 85 Testing individual bits in a byte

87. 86 Testing Individual Bits in a Byte: To test bit 2 of location $8O LDA 8O byte to test AND #O4mask OOOO O1OO

88. 87 The Byte 7 6 5 4 3 2 1 0 0 0 0 0 0 1 0 0 Hex 04 ?

89. 88 Testing Individual Bits in a Byte: eg - to test bit 2 of location $8O LDA 8O byte to test AND #O4mask OOOO O1OO

90. 89 Testing Individual Bits in a Byte: eg - to test bit 2 of location $8O LDA 8O byte to test AND #O4mask OOOO O1OO $8O contains $B7 A 1O11 O111 M OOOO O1OO --------- OOOO O1OO Z flag =O

91. 90 Testing Individual Bits in a Byte: eg - to test bit 2 of location $8O LDA 8O byte to test AND #O4mask OOOO O1OO $8O contains $B7 $8O contains $69 A 1O11 O111 A O11O 1OO1 M OOOO O1OO M OOOO O1OO --------- --------- OOOO O1OO OOOO OOOO Z flag =O Z flag =1

92. 91 The BIT Instruction: (this is rather a funny instruction) eg LDA #O1 mask for AND BIT 8O byte to test Z is set by the result of the AND: 1OO1 1OO1 OOOO OOO1 --------- OOOO OOO1 ie non-zero so Z =O 10011001 7 6 5 4 3 2 1 0 N V

93. 92 Logical instructions - Example: LDA #33 Result is: OO11 OO11 33 AND #OF ORA #9O EOR #8O EOR #FF

94. 93 Logical instructions - Example: LDA #33 Result is: OO11 OO11 33 AND #OF Result is: OOOO OO11 O3 ORA #9O EOR #8O EOR #FF

95. 94 Logical instructions - Example: LDA #33 Result is: OO11 OO11 33 AND #OF Result is: OOOO OO11 O3 ORA #9O Result is: 1OO1 OO11 93 EOR #8O EOR #FF

96. 95 Logical instructions - Example: LDA #33 Result is: OO11 OO11 33 AND #OF Result is: OOOO OO11 O3 ORA #9O Result is: 1OO1 OO11 93 EOR #8O Result is: OOO1 OO11 13 EOR #FF

97. 96 Logical instructions - Example: LDA #33 Result is: OO11 OO11 33 AND #OF Result is: OOOO OO11 O3 ORA #9O Result is: 1OO1 OO11 93 EOR #8O Result is: OOO1 OO11 13 EOR #FF Result is: 111O 11OO EC

98. 97 Shift and Rotate Instructions

99. 98 Shift and Rotate Instructions: ASL

100. 99 Shift and Rotate Instructions: ASL LSR

101. 100 Shift and Rotate Instructions: ASL LSR ROL

102. 101 Shift and Rotate Instructions: ASL LSR ROL ROR

103. 102 The ASL instruction: The bits in the byte are shifted one position to the left A zero is shifted into bit O Bit 7 is shifted out into the carry flag eg ASL 42 ASL 21OF ASL A New Addressing Mode! 0 C 7 0

104. 103 The LSR instruction: The bits in the byte are shifted one position to the right A zero is shifted into bit 7 Bit 0 is shifted out into the carry flag eg LSR 42 LSR 21OF LSR A 0 C 7 0

105. 104 The ASL instruction: C7 0 001000000

106. 105 The ASL instruction: C7 0 000100000

107. 106 The ASL instruction: C7 0 000010000

108. 107 The ASL instruction: C7 0 000001000

109. 108 The ASL instruction: C7 0 000000100

110. 109 The ASL instruction: C7 0 000000010

111. 110 The ASL instruction: C7 0 000000001

112. 111 The ASL instruction: C7 0 100000000

113. 112 The ASL instruction: C7 0 000000000

114. 113 The ROL instruction: The bits in the byte are shifted one position to the left The original value of the carry is shifted into bit O Bit 7 is shifted out into the carry flag C 7 0

115. 114 The ROR instruction: The bits in the byte are shifted one position to the right The original value of the carry is shifted into bit 7 Bit 0 is shifted out into the carry flag C 7 0

116. 115 eg LSR 80 msb ROR 81 lsb 80 81 10011001 7 6 5 4 3 2 1 0 10011001 1 0 2 Byte Shift C

117. 116 Jumping and Branching and Comparing

118. 117 Unconditional Jump - JMP O25O CLC O251 LDA 4O O253 ADC 41 O255 STA 42 --O257 JMP O25E | O25A LDA 8O | O25C STA 81 --O25E LDA FOFA O261 STA 35

119. 118 Conditional Branch Instructions: BNE Branch if not equal to zero Z =O BEQ Branch if equal to zero Z =1 BCC Branch if carry clear C =O BCS Branch if carry set C =1 BPL Branch if plus (positive) N =O BMI Branch if minus (negative) N =1 (BVC Branch if overflow clear V =O) (BVS Branch if overflow set V =1)

120. 119 Conditional Branch Instructions: O25O LDA 8O --O252 BNE O256 | O254 LDA 81 --O256 STA 82 O258 BRK O25O A5 (LDA) -4 = FC O251 8O -3 = FD O252 DO (BNE) -2 = FE O253 O2 -1 = FF O254 A5 (LDA) O = OO O255 81 +1 = O1 O256 85 (LDA) +2 = O2 O257 82 +3 = O3 O258 OO (BRK) +4 = O4

121. 120 Delay Loop: 10s O4OO LDA #12;$12 = 18 decimal O4O2 STA 82 O4O4 LDA #OO O4O6 STA 8O O4O8 STA 81 O4OA DEC 8O O4OC BNE O4OA ;inner loop O4OE DEC 81 O41O BNE O4OA ;next loop O412 DEC 82 O414 BNE O4OA ;outer loop O416 RTS

122. 121 Comparing CMP CPX CPY

123. 122 Compare Instructions: CMP CPX CPY Examples: CMP 8O CPX 8O CPY 8O CMP 1234 CPX 1234 CPY 1234 CMP #O3 CPX #O3 CPY #O3 The Z and C flags are changed after a compare instruction as follows: A = M then Z =1 (BEQ will branch) A <> M then Z =O (BNE will branch) A >= M then C =1 (BCS will branch) A < M then C =O (BCC will branch)

124. 123 To compare the contents of $5O and $51: O25O LDA 5O first number O252 CMP 51 second number O254 BEQ O26O branch if first=second O256 BCS O27O branch if first>second O258 BCC O28O branch if first second | O28O here if first<second

125. 124 Loops and Indexed addressing

126. 125 Incrementing and Decrementing

127. 126 Incrementing and Decrementing: Memory Locations: INC 8O DEC 2F INC O412 DEC 12BA Registers: INX DEX INY DEY

128. 127 Car Mileometer What happens if you drive forward one more mile? 99999

129. 128 Car Mileometer What happens if you reverse one mile? 00000

130. 129 Decrementing X Instruction Value of X after instruction 04 DEX O3 DEX O2 DEX O1 DEX OO (Z flag set) DEX FF DEX FE DEX FD

131. 130 Incrementing X Instruction Value of X after instruction FC INX FD INX FE INX FF INX OO (Z flag set) INX 01 INX 02 INX 03

132. 131 Looping

133. 132 Loop Example: add the contents of locations 80 to 85 O25O LDA #OO A will hold sum O252 LDX #OO X - loop counter O254 CLC -O255 ADC 8O,X Add next byte | O257 INX | O258 CPX #O6 Have we finished? -O25A BNE O255 If not continue O25C STA 8A Store the sum O25E BRK 80 81 82 83 84 85 86 87

134. 133 Indexed Addressing

135. 134 Indexed Addressing: Zero Page,X ADC 8O,X Zero Page,Y LDX 8O,Y Absolute,X LDA 123A,X Absolute,Y LDA 456B,Y

136. 135 Delay Loop: 10ms O3OO LDY #OA;outer loop 1O times O3O2 LDX #C8;inner loop 2OO times O3O4 DEX O3O5 BNE O3O4 O3O7 DEY O3O8 BNE O3O2 O3OA RTS

137. 136 Delay Loop: 10s O4OO LDA #12;$12 = 18 decimal O4O2 STA 82 O4O4 LDA #OO O4O6 STA 8O O4O8 STA 81 O4OA DEC 8O O4OC BNE O4OA ;inner loop O4OE DEC 81 O41O BNE O4OA ;next loop O412 DEC 82 O414 BNE O4OA ;outer loop O416 RTS

138. 137 The NOP Instruction NOP does nothing 1 byte 2 clock cycles

139. 138 Subroutines and the Stack

140. 139 Subroutines: 0200LDA 94 AND #07 JSR 0500 0207LDA 940500LDA 80 ORA #80AND #0F JSR 0500RTS 020ELDX #08 JSR 0500 0213STA 60,X DEX |

141. 140 Subroutines: JSR 0500 RTS

142. 141 The Stack: SP 01FF A1 01FF 35 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

143. 142 Push and Pull Instructions: Register A: PHA store on stack PLA get from stack Flag Register: PHP store on stack PLP get from stack

144. 143Subroutines LDA #30 STA 51 CLC ADC #42 LSR A JSR 0400 CMP #05 BNE 0294 JMP 0280 LDA 50 ADC #42 LSR A C MP #05 BNE 0294 JMP 0280 LDA 50 STA 62 ROR 7E LDA #30 STA 51 CLC ADC #42 LSR A CMP #05 BNE 0294 JMP 0280 LDA 50 STA 62 LDA #30 STA 51 CLC ADC #42 LSR A JSR 0500 STA 9A LSR A STA 3B RTS 0400 LSR A STA 6F STA 77 RTS 0500 SP 01FF AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0250 0262 0413 * Before First JSR *

145. 144 The Stack: SP 01FF A1 01FF 35 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

146. 145 The Stack: Store the value AA on the stack SP 01FF A1 01FF 35 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

147. 146 The Stack: Store the value AA on the stack SP 01FE AA 01FF 35 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

148. 147 The Stack: Store the value F3 on the stack SP 01FE AA 01FF 35 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

149. 148 The Stack: Store the value F3 on the stack SP 01FD AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

150. 149 The Stack: The Stack pointer always contains the address of the next free location SP 01FD AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

151. 150 The Stack: Get a byte from the stack SP 01FD AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

152. 151 The Stack: Get a byte from the stack The Stack Pointer is first incremented to point to the last value stored SP 01FE AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

153. 152 The Stack: Get a byte from the stack: We get the value F3 - the last value stored 01FE is now the next free location SP 01FE AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9 0100 |

154. 153 What happens when a subroutine is called: before JSR 0260 JSR 0500 0263 LDA #00 0500 LDX #03 0502 TAY 0503 RTS SP 01FF AA 01FF F3 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9

155. 154 What happens when a subroutine is called: after JSR 0260 JSR 0500 0263 LDA #00 0500 LDX #03 0502 TAY 0503 RTS SP 01FD 02 01FF 62 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9

156. 155 What happens when a subroutine is called: after RTS 0260 JSR 0500 0263 LDA #00 0500 LDX #03 0502 TAY 0503 RTS SP 01FF 02 01FF 62 01FE 29 01FD 81 01FC 12 01FB 7B 01FA 5D 01F9

157. 156 Interrupts

158. 157 Interrupts Main Program: LDA #30 STA 51 CLC ADC #42 LSR A CMP #05 BNE 0294 JMP 0280PHA LDA 50LDA #33 STA 62STA 51 ROR 7ELDA A000 LDA #30STA 80 STA 51LDA A001 CLCSTA 81 ADC #42INC 9A ADC #42INC 9A LSR ADEC 9B CMP #05PLA BNE 0294RTI JMP 0280 LDA 50 STA 62 ROR 7E LDA #30 STA 51 CLC ADC #42 LSR A CMP #05 BNE 0294 JMP 0280 LDA 50 STA 62 Interrupt occurs here Interrupt Routine: When an interrupt occurs, the return address is stored on the stack, in the same way as for a subroutine call. The contents of the flag register is also stored on the stack.

159. 158 6502 Interrupt inputs: ___ IRQ ___ NMI ___ RES 6502 microprocessor 5v 0v 10K

160. 159 6502 Vectors: ___ NMI $FFFA + $FFFB ___ RES $FFFC + $FFFD ___ IRQ $FFFE + $FFFF

161. 160 Vectors: FFFF FFFE FFFD FFFC FFFB FFFA Memor y 7 0 IRQ LSB IRQ MSB RES MSB RES LSB NMI MSB NMI LSB

162. 161 6502 Programmer’s Model 00000001 NV-BDIZC A X PC SP PS Y 7 0 15 8 FFFF 0200 01FF 0100 00FF 0000 Microprocessor Memory STACK PAGE ZERO 7 0

163. 162 The Interrupt Flag I: CLI set I = O - Enable IRQ interrupts SEI set I = 1 - Disable IRQ interrupts

164. 163 Saving registers used in interrupt routines: PHA; save A ( no need to save the flags) TXA PHA; save X TYA PHA; save Y | {interrupt routine instructions} | PLA TAY ; restore Y PLA TAX ; restore X PLA ; restore A RTI

165. 164 The BRK Instruction: BRK

166. 165 6502 Programmer’s Model 00000001 NV-BDIZC A X PC SP PS Y 7 0 15 8 FFFF 0200 01FF 0100 00FF 0000 Microprocessor Memory STACK PAGE ZERO 7 0

167. 166 Checking the B BRK Flag: PHA save A PHP get flags in A PLA AND #1O test bit 4 (B flag) BNE O81Oif set it was BRK interrupt | else continue with normal IRQ | routine from external input | RTI

168. 167 On Tuesday we did: Indirect Addressing

169. 168 Direct and Indirect addressing: 2340234123422343234423452346 One of these houses contains the treasure (the data) If I know the address (2342) then...

170. 169 Direct addressing: 2340234123422343234423452346 I go directly to address 2342 where the data (the treasure) is stored Treasure!

171. 170 Direct and Indirect addressing: 2340234123422343234423452346 This time I don’t know where the treasure is stored, but I do know that I can find the address by going to another house (2346) So I go to address 2346 where...

172. 171 Indirect addressing: 2340234123422343234423452346 I get the data - the address where the treasure is - address 2342. I can then go to address 2342 and get the data there - the treasure. 2342

173. 172 Indirect addressing: 2340234123422343234423452346 I go to address 2342 where the data (the treasure) is stored Treasure!

174. 173 Indirect Addressing gives us the address of the address that we want

175. 174 IndirectJMP

176. 175 Direct JMP: JMP O8O7 Indirect JMP: JMP (O8O7)

177. 176 Indirect JMP: JMP (O8O7) results in a jump to location $1234 Memor y 7 0 0808 0807 12 34

178. 177 Indexed Indirect Addressing

179. 178 Indexed indirect or pre-indexed indirect addressing: (IND,X) eg LDA (8O,X) Indirect indexed or post-indexed indirect addressing: (IND),Y eg LDA (8O),Y Both these addressing modes are only available with zero page addresses for IND

180. 179 Indexed indirect or pre-indexed indirect addressing: For (IND,X) addressing, the current value of X is added to IND. This gives the address of the address to be used. Indirect indexed or post-indexed indirect addressing: For (IND),Y addressing, IND gives the address of the address to be indexed. This address is then indexed by Y giving the address to be used.

181. 180 (IND,X) example: If: The X register contains 5 Location $85 contains $78 Location $86 contains $56 and the following instruction is executed: LDA (8O,X) then the contents of X is added to $8O giving $85. The address actually used is found in locations $85 and $86 ie $5678. So that using these values, LDA (8O,X) is equivalent to LDA 5678

182. 181 Indexed Indirect Addressing (I,X) eg if X = 5 LDA (80,X) result: LDA (85) LDA 5678 Memor y 7 0 86 85 56 78

183. 182 (IND),Y example: If: The Y register contains 7 Location $8O contains $34 Location $81 contains $12 and the following instruction is executed: LDA (8O),Y then the address stored in $8O and $81 is to be indexed by Y, equivalent to LDA 1234,Y. Final address=$1234 + Y (7) = $123B. Using these values, LDA (8O),Y is equivalent to LDA 123B

184. 183 Indexed Indirect Addressing (I),Y eg if Y = 7 LDA (80),Y result: LDA 1234,Y LDA 123B Memor y 7 0 81 80 12 34

185. 184 Indexed Addressing: LDA 0600,Xrange of X is 00 - FF so this instruction can address locations 0600 - 06FF Indexed Indirect Addressing: LDA (20),Y Using just Y this instruction can address locations 0600 - 06FF BUT 7 0 21 20 06 00

186. 185 Indexed Addressing: LDA 0600,Xrange of X is 00 - FF so this instruction can address locations 0600 - 06FF Indexed Indirect Addressing: LDA (20),Y Using just Y this instruction can address locations 0600 - 06FF BUT Location 21 can then be incremented so the instruction will then address locations 0700-07FF. So we can address as much of memory as we want to. 7 0 21 20 07 00

187. 186 Input/OutputProgramming Using the 6522 VIA

188. 187 The VIA:

189. 188 FFFF 0000 Microprocessor System Memory Map: 7 0 RAM I/O ROM

190. 189 FFFF 0000 Microprocessor System Memory Map: 7 0 RAM I/O ROM LDA 0300 LDA F000 LDA A000

191. 190 The VIA: VIA __ CS

192. 191 The VIA: VIA __ CS A0A0 A1A1 A2A2 A3A3

193. 192 The VIA: VIA __ CS A0A0 A1A1 A2A2 A3A3 A 0 to A 3 so 0000-1111 ie 16 locations

194. 193 VIA Registers (AIM addresses): A000 Port B Data Register (DRB) A001 Port A Data Register (DRA) A002 Port B Data Direction Register (DDRB) A003 Port A Data Direction Register (DDRA) A004 Timer 1 LSB A005 Timer 1 MSB A006 Timer 1 A007 Timer 1 A008 Timer 2 LSB A009 Timer 2 MSB A00A Shift Register A00B Auxiliary Control Register (ACR) A00C Peripheral Control Register (PCR) A00D Interrupt Flag Register (IFR) A00E Interrupt Enable Register (IER) A00F Port A Data Register (No handshake)

195. 194 The VIA: VIA PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 CA2 CA1 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 CB2 CB1 Port A Port B

196. 195 Simple use of the VIA: LDA #00Set Port A as all inputs STA A003Data direction register A LDA #FFSet Port B as all outputs STA A002Data direction register B LDA A001Read Port A STA A000Write to Port B JMP

197. 196 The VIA: VIA PA0 PB0 5v 0v Buffer 0v 220 10K

198. 197 Using the CB2 Control Line: PCR7 PCR6 PCR5 Mode: for operation of CB2 control line 0 0 0 Input: IFR3 set by neg edge on CB2, cleared by read or write to DRB 0 0 1 Input: IFR3 set by neg edge on CB2, NOT cleared by read/write to DRB 0 1 0 Input: IFR3 set by pos edge on CB2, cleared by read or write to DRB 0 1 1 Input: IFR3 set by pos edge on CB2, NOT cleared by read/write to DRB 1 0 0 Output: CB2 low on write to DRB, CB2 high by active edge on CB1 1 0 1 Output: CB2 low for one clock cycle following write to DRB 1 1 0 Output: CB2 held low 1 1 1 Output: CB2 held high

199. 198 Handshaking: Microprocessor system and a Printer VIA Printer PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 CB2 CB1 READY STROBE DO D1 D2 D3 D4 D5 D6 D7 1. Byte is output from VIA on Port B 2. STROBE pulse is output on CB2 3. Program waits for READY line to go High

200. 199 VIA Timer: C3 50 MSB LSB C350 = 50,000 ie 50ms if system clock is 1 MHz

201. 200 The End !