1. ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

2. Fall 2010ECE 331 - Digital System Design2 Material to be covered … Chapter 13: Sections 1 – 4 Chapter 17: Section 4

3. Fall 2010ECE 331 - Digital System Design3 Combinational vs. Sequential Combinational Logic Circuit  Output is a function only of the present inputs.  Does not have state information.  Does not require memory. Sequential Logic Circuit (aka. Finite State Machine)  Output is a function of the present state.  Has state information  Requires memory.  Uses Flip-Flops to implement memory.

4. Fall 2010ECE 331 - Digital System Design4 Synchronous vs. Asynchronous Synchronous Sequential Logic Circuit  Clocked  All Flip-Flops use the same clock and change state on the same triggering edge. Asynchronous Sequential Logic Circuit  No clock  Can change state at any instance in time.  Faster but more complex than synchronous sequential circuits.

5. Fall 2010ECE 331 - Digital System Design5 General Models for Sequential Circuits A sequential circuit can be divided conveniently into two parts -- the flip-flops which serve as memory for the circuit and the combinational logic which realizes the input functions for the flip-flops and the output functions. The combinational logic may be implemented with gates, with a ROM, or with a PLA.

6. Fall 2010ECE 331 - Digital System Design6 Sequential Circuits: Models Moore Machine  Outputs are a function of the present state.  Outputs are independent of the inputs.  State diagram includes an output value for each state. Mealy Machine  Outputs are a function of the present state and the present input.  State diagram includes an input and output value for each transition (between states).

7. Fall 2010ECE 331 - Digital System Design7 Sequential Circuits: Models

8. Fall 2010ECE 331 - Digital System Design8 Sequential Circuits: Mealy Model

9. Fall 2010ECE 331 - Digital System Design9 Sequential Circuits: Moore Model

10. Fall 2010ECE 331 - Digital System Design10 Sequential Circuits: State Diagram State Output Input Moore Machine Each node in the graph represents a state in the sequential circuit.

11. Fall 2010ECE 331 - Digital System Design11 Sequential Circuits: State Diagram Mealy Machine Each node in the graph represents a state in the sequential circuit. Input State Output

12. Fall 2010ECE 331 - Digital System Design12 Sequential Circuit Analysis

13. Fall 2010ECE 331 - Digital System Design13 Analysis by Signal Tracing We can analyze clocked sequential circuits to find the output sequence resulting from a given input sequence by tracing 0 and 1 signals through the circuit. The basic procedure is: 1.Assume an initial state of the flip-flops (all flip-flops reset to 0 unless otherwise specified). 2.For the first input in the given sequence, determine the circuit output(s) and flip-flop inputs. 3.Determine the new set of flip-flop states after the next active clock edge. 4.Determine the output(s) that corresponds to the new states. 5.Repeat 2, 3, and 4 for each input in the given sequence.

14. Fall 2010ECE 331 - Digital System Design14 Example: Moore Machine

15. Fall 2010ECE 331 - Digital System Design15 Example: Moore Machine 01101

16. Fall 2010ECE 331 - Digital System Design16 Example: Mealy Machine

17. Fall 2010ECE 331 - Digital System Design17 Example: Mealy Machine

18. Fall 2010ECE 331 - Digital System Design18 Analysis using State Tables and Graphs Although constructing timing charts is satisfactory for small circuits and short input sequences, the construction of state tables and graphs provides a more systematic approach which is useful for the analysis of larger circuits and which leads to a general synthesis procedure for sequential circuits. The state table specifies the next state and output of a sequential circuit in terms of its present state and input.

19. Fall 2010ECE 331 - Digital System Design19 Analysis Procedure 1.Determine the flip-flop input equations and the output equations from the circuit. 2.Derive the next-state equation for each flip-flop from its input equations, using one of the following relations: D flip-flopQ + = D(13-1) D-CE flip-flop Q + = DCE + QCE′(13-2) T flip-flopQ + = T Q(13-3) S-R flip-flopQ + = S + R′Q(13-4) J-K flip-flopQ + = JQ′ + K′Q(13-5)

20. Fall 2010ECE 331 - Digital System Design20 Analysis Procedure 3.Plot a next-state map for each flip-flop. 4.Combine these maps to form the state table. Such a state table, which gives the next state of the flip-flops as a function of their present state and the circuit inputs, is frequently referred to as a transition table.

21. Fall 2010ECE 331 - Digital System Design21 Sequential Circuit Analysis Determine the Flip-Flop input equations  In terms of the present state and input variables Determine the FSM output equation(s) Determine the next state values in the state table  Assume binary encoding  Use Flip-Flop Characteristic Equation Construct the state table  Assign a state to each binary state assignment Draw the corresponding state diagram Determine the behavior of the FSM

22. Fall 2010ECE 331 - Digital System Design22 Example: Analyze a sequential circuit using D Flip-Flops

23. Fall 2010ECE 331 - Digital System Design23 Example: Analysis (D FF) Derive the State Table for the following Sequential Logic Circuit:

24. Fall 2010ECE 331 - Digital System Design24 Example: Analysis (D FF) 1. The flip-flop input equations and output equation are D A = X xor B'D B = X or A Z = A or B 2. The next-state equations for the flip-flops are A + = X xor B'B + = X or A

25. Fall 2010ECE 331 - Digital System Design25 Example: Analysis (D FF) 3. The corresponding next-state (K-) maps are

26. Fall 2010ECE 331 - Digital System Design26 Example: Analysis (D FF) 4. The state table, or transition table, is then determined from the next-state maps

27. Fall 2010ECE 331 - Digital System Design27 Example: Analysis (D FF) 5. The state graph can then be drawn from the state table

28. Fall 2010ECE 331 - Digital System Design28 Example: Analyze a sequential circuit using JK Flip-Flops

29. Fall 2010ECE 331 - Digital System Design29 Example: Analysis (JK FF) Derive the State Table for the following Sequential Logic Circuit:

30. Fall 2010ECE 331 - Digital System Design30 Example: Analysis (JK FF) 1. The flip-flop input equations and output equation are J A = X.BJ B = X Z = X.B' + X.A + X'.A'.B 2. The next-state equations for the flip-flops are A + = J A.A' + K A '.AB + = J B.B' + K B '.B K A = XK B = X.A A + = X.B.A' + X.AB + = X.B' + X.A.B

31. Fall 2010ECE 331 - Digital System Design31 Example: Analysis (JK FF) 3. The corresponding next-state (K-) maps are

32. Fall 2010ECE 331 - Digital System Design32 Example: Analysis (JK FF) 4. The state table, and transition table, is then determined from the next-state maps

33. Fall 2010ECE 331 - Digital System Design33 Example: Analysis (JK FF) 5. The state graph can then be drawn from the state table

34. Fall 2010ECE 331 - Digital System Design34 Example: Analyze a serial adder

35. Fall 2010ECE 331 - Digital System Design35 Example: Serial Adder The serial adder adds two n-bit binary numbers. serial inputs serial output

36. Fall 2010ECE 331 - Digital System Design36 Example: Serial Adder Truth Table for the Full Adder:

37. Fall 2010ECE 331 - Digital System Design37 Example: Serial Adder Timing Diagram for the Serial Adder:

38. Fall 2010ECE 331 - Digital System Design38 Example: Serial Adder State Graph for the Serial Adder: What type of state machine is this?

39. Fall 2010ECE 331 - Digital System Design39 Example: Analyze a state machine with multiple inputs.

40. Fall 2010ECE 331 - Digital System Design40 Example: Multiple Inputs State Table for a state machine with multiple inputs:

41. Fall 2010ECE 331 - Digital System Design41 Example: Multiple Inputs State Graph for a state machine with multiple inputs: How many paths leave each state? What type of state machine is this?

42. Fall 2010ECE 331 - Digital System Design42 Questions?