1. Characterization Presentation Neural Network Implementation On FPGA Supervisor: Chen Koren Maria Nemets 309326767 Maxim Zavodchik 310623772

2. Introduction  Neural Network is a sort of artificial intelligence  NN is an imitation of a human body  A NN acquires knowledge through learning.  NN can learn in real time  Applications:  Optical Characters Recognition  Voice Recognition  Financial Forecasting  Medical Diagnosis

3. Theoretical Background Neuron Model (Perceptron): Neuron Model (Perceptron): The single neuron is a device that implements the function Activate function – some bounded continuously rising function (for example, sigmoid). X is an input vector W is a weight vector  Knowledge is stored within inter-neuron connection strengths

4. Learning of the neural network   Popular implementation is a multilayer feed forward network Neural network learns from examples Neural network learns from examples Learning is changing weights to implement the desired classification function Learning is changing weights to implement the desired classification function There are algorithms which change the weights in the network There are algorithms which change the weights in the network We will use Back Propagation learning algorithm We will use Back Propagation learning algorithm Minimizes the difference between output and training example. Minimizes the difference between output and training example. Weight changes depend on the units in the layer below. Weight changes depend on the units in the layer below.

5. Project Objectives Implementing Neural Network on FPGA Implementing Neural Network on FPGA  Creating modular design  Implementing in software (Matlab)  Creating PC Interface Performance Analyze: Performance Analyze:  Area on chip  Interconnections  Speed vs. software implementation  Frequency  Cost

6. Development Stages Choosing application: 0-9 Digits Recognition Choosing application: 0-9 Digits Recognition Implementing a single neuron in VHDL Implementing a single neuron in VHDL Determining network structure Determining network structure Building NN in Matlab, training and testing it Building NN in Matlab, training and testing it Determining weights length and resolution Determining weights length and resolution Choosing the proper hardware: FPGA and Memory Choosing the proper hardware: FPGA and Memory Planning FSM controller Planning FSM controller Implementing the NN in VHDL Implementing the NN in VHDL Simulation and Synthesis Simulation and Synthesis Performance analysis: hardware vs. software Performance analysis: hardware vs. software

7. System Interface Inputs Inputs  Binary image ( 8x8 pixels )  Weights – The size will be determined  Getting inputs by blocks Outputs Outputs  Vector size of 4 bits coding the digit or indicating a failure

8. Neuron Architecture Multipliers for calculating Multipliers for calculating Adder for calculating the Adder for calculating the ROM implementing Activation function ROM implementing Activation function SRAM saving the weights SRAM saving the weights SRAM saving the input image SRAM saving the input image FSM Controller FSM Controller

9. Neuron Architecture

10. Hardware Requirements Memec Development Board Memec Development Board Virtex II Pro FPGA Virtex II Pro FPGA 44 18x18-bit Multipliers 44 18x18-bit Multipliers 88 KB of on-chip memory 88 KB of on-chip memory Power PC 4.05 CPU core Power PC 4.05 CPU core 32 MB of SDRAM 32 MB of SDRAM 100MHz & 125 MHz clocks 100MHz & 125 MHz clocks 2x16 LCD panel 2x16 LCD panel Serial port interface Serial port interface

11. Hardware Requirements Load Weights To SDRAM Load Image From User Load Weights To BRAM Calculate Intermediate Sum Calculate Output Return Result To User

12. Special Problems Problem: NN interconnection complexity Problem: NN interconnection complexity Solution: Designing sub-networks for each digit Problem: Numbers representation Problem: Numbers representation Solution: Fixed-Point representation avoiding Floating Point operations Problem: Determining accuracy Problem: Determining accuracy Solution: Choosing proper resolution from Matlab simulations Problem: Trade-off between Area and Concurrency Problem: Trade-off between Area and Concurrency Solution: Searching for big FPGA which enables maximal parallelizing

13. Special Problems Problem: Modulation vs. Speed Problem: Modulation vs. Speed Solution: Simulating the hardware NN and finding the trade-off Problem: Large Memory size Problem: Large Memory size Solution: Finding FPGA with big memory or using outside memory cores memory cores Problem: Sigmoid function is continuous and infinite Problem: Sigmoid function is continuous and infinite Solution: - Function quantization according to our resolution to our resolution - Saving values for arguments in limited range - Saving values for arguments in limited range

14. Schedule AssignmentDate Learning the theoretical background Training and testing an example NN in Matlab 31.10-5.11 Implementing a single Neuron in VHDL, synthesizing and checking its area 7.11-12.11 Finding suitable Hardware solution (Area, Memory) 14.11-19.11 Characterization Presentation17.11 Building training set Building our NN in Matlab, training and testing Determining weight length and needed resolution 21.11-3.12 Determining NN structure Proposing final architecture 5.12-10.12

15. Schedule Date:Assignment 12.12-17.12 Implementing Sigmoid function Planning the FSM Controller 19.12-7.01Implementing the NN in VHDL 20.12Midterm presentation 9.01-21.01Simulating the NN Synthesis 23.01-28.01Analyzing performance Writing project book 21.02Final presentation