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ISL David Stuart, UC Santa Barbara May 11, 2006 David Stuart, UC Santa Barbara May 11, 2006
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ISL David Stuart, UC Santa Barbara May 11, 2006 David Stuart, UC Santa Barbara May 11, 2006 Formerly known as Intermediate Radius Silicon
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I’ll review the motivation for the detector and give a tour of its design and construction
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The motivation is best shown by looking at an event display from Run 1.
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Tracks are obviously missed and obviously easy to find.
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Actual size
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Unused hits from: 1.Low p T > 1
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Using forward silicon hits in Run 1 1.Stand-alone silicon pattern recognition Fit for 0, d 0, p T (curvature) with 4 hits, <=1 dof. It worked, but was limited by lever arm (L 2 ) Too few hits Poor curvature resolution degraded impact parameter resolution 4% relative increase in b-tagging for top
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Using forward silicon hits in Run 1 2.Calorimeter-seeded tracking for electrons i.e., Phoenix ee E T event
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ISL designed to extend lever arm SVX’ (Run 1) L00 SVXII ISL
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Design goals Fine granularity at large radius for Low occupancy typical jet has ~10 tracks in a <0.2 cone, covers 1000 channels Resolution and lever arm (BL 2 ) 100 m pitch = 30 m resolution sufficient for Negligible effect on d 0 resolution Pointing into COT < hit resolution at high p T < hit width at low p T 2trk COT res
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Portcard scattering is a real complication
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Design requirements Big (5 m 2 ) Cheap Fast
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Design requirements Big (5 m 2 ) simple Cheap simple Fast simple Piggybacking on SVX-II infrastructure important
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Sensor Design Big- used max possible sensor size per wafer. HPK only had 4” wafers Micron had 6”, and they were cheaper (in both senses of the word). Layer 6 built with HPK at Fermilab Layer 7 built with Micron at Pisa Different geometries, mechanics, & quality
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Readout Hybrid Double sided and spacious Pitch adapter Transceiver
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Half ladder
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Full ladder
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Ganging Not in trigger, but don’t preclude, so r-phi read first. 16 chips total--max FIB can handle. Note up-down reverses hall effect and readout direction.
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Joel dropped them in place
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Supported by carbon fiber spaceframe Containing cable and cooling and gang card mounts
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Notable differences from SVXII Because rad damage is less of a concern, and no direct silicon heating –ISL operates ~10 deg warmer than SVXII Layer 6 has the implant on the z-side IB0,1,4,5 (forward region) –L0,L2,L4 are layer seven (Micron sensors) –L1,L3 are layer six (Hamamatsu sensors) IB2,3 (central region) –Everything is layer six Within a given layer, IBxWyLz, y and z denote phi position of ganged readout pair
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Forward tracking Recall Design goals
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Forward tracking ? Recall Design goals
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