Presentation is loading. Please wait.

Presentation is loading. Please wait.

Chapter 3 Arithmetic for Computers. Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's.

Similar presentations


Presentation on theme: "Chapter 3 Arithmetic for Computers. Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's."— Presentation transcript:

1 Chapter 3 Arithmetic for Computers

2 Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's look at 3 versions based on grade school algorithm 0010 (multiplicand) __x_1011 (multiplier)

3 Multiplication: Implementation t 32nd repetition? Start Multiplier0 = 0Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions ProductMultiplierMultiplicand 0000 0000 00110000 0010 0000 001000010000 0100 0000 011000000000 1000 0000 0110

4 Second Version ift the Multiplier register right 1 bit 32nd repetition? Start Multiplier0 = 0Multiplier0 = 1 No: < 32 repetitions Yes: 32 repetitions 0000 0000 0011 0010 1: 0010 0000 0011 0010 2: 0001 0000 0011 0010 3: 0001 0000 0001 0010 1: 0011 0000 0001 0010 2: 0001 1000 0001 0010 3: 0001 1000 0000 0010 1: 0001 1000 0000 0010 2: 0000 1100 0000 0010 3: 0000 1100 0000 0010 1: 0000 1100 0000 0010 2: 0000 0110 0000 0010 3: 0000 0110 0000 0010 0000 0110 0000 0010 Product Multiplier Multiplicand

5 Final Version

6 Signed Multiplication Convert the multiplier and multiplicand to positive numbers and remember the original signs. Negate the product if the original signs disagree. A more elegant method: Booth’s algorithm

7 Booth’s Algorithm Classifying groups of bits into the beginning, the middle or the end of a run of 1s Take a look at 2-bit groups 01110 Middle of Run End of Run Beginning of Run

8 Booth’s Algorithm (Cont’d) Depending on the current and previous bits, do one of the following: 00: no arithmetic operation 01: End of a string of 1s, so add multiplicand to the left half of the product 10: Beginning of a strings of 1s, so subtract the multiplicand from the left half of the product 11: no arithmetic operation Shift the Product register right 1 bit.

9 Example 2x-3 = 6 or 0010x1101 = 1111 1010

10 Multiply by 2^i via shift Shift left by one bit --> multiply by 2 Shift left by n bit --> multiply by 2^n Proof of Booth’s Algorithm

11 Why does it work for 2’s complement signed number? In other words, if (a i-1 - a i ) = 0 do nothing = 1 add b = -1 subtract b Booth’s algorithm can be written as: (a -1 - a 0 ) x b x 2^0 + (a 0 - a 1 ) x b x 2^1 + … +(a 30 -a 31 )x b x 2^31 = … = b x a

12 Faster Multiplication Use 32 adders instead of using a single 32-bit adder on at a time.

13 Multiply in MIPS Use a pair of 32-bit registers to contain the 64-bit product, called Hi and Lo mult: signed multiplication multu: unsigned multiplication mflo: move from lo to fetch the integer 32-bit product mfhi Both mult and multu ignore overflow! You must take care of this yourself in the software. How? Check the value of Hi Hi must be 0 for multu Hi must be the replicate sign of Lo for mult

14 Division Some definitions: Dividend, Divisor, Quotient, Remainder Dividend = Quotient X Divisor + Remainder Example: 1001010 divided by 1000 1001 Quotient Divisor 1000 1001010 Dividend –1000 10 101 1010 –1000 10 Remainder (or Modulo result)

15 First Version of the division hardware 64-bit ALU Control test Quotient Shift left Remainder Write Divisor Shift right 64 bits 64 bits 32 bits gister to the left, setting the new least significant bit to 0 1. Subtract the Divisor register from the Remainder register and place the result in the Remainder register Remainder > 0

16 Observations on the first version of the division hardware 1/2 bits in divisor always 0 1/2 of 64-bit adder is wasted 1/2 of divisor is wasted Instead of shifting divisor to right, shift remainder to left? 1st step cannot produce a 1 in quotient bit (otherwise too big) switch order to shift first and then subtract, can save 1 iteration

17 Second Version of the division hardware Control test Quotient Shift left Write 32 bits 64 bits 32 bits Shift left Divisor 32-bit ALU Remainder

18 Final Version of the division hardware Write 32 bits 64 bits Shift left Shift right Remainder 32-bit ALU Divisor Control test ft half of the Remainder register Remainder 0 1. Shift the Remainder register left 1 bit >

19 Signed Division Remember signs of the divisor and dividend, negate the quotient if the signs disagree. What about the sign of the remainder? Rule: Dividend and remainder must have the same sign.

20 Division in MIPS Same hardware can be used for both multiply and divide so long as we have a 64-bit register that can shift left or right and a 32-bit ALU that adds or subtracts. Hi: contains remainder Lo: contains quotient div vs divu

21 Representing Real Numbers We need a way to represent numbers with fractions, e.g., 3.1416 very small numbers, e.g.,.000000001 very large numbers, e.g., 3.15576 x 10 9 Use normalized scientific notation Called floating point number because the binary point is not fixed. Advantages: simplifies data exchange simplifies floating point arithmetic algorithms increases accuracy

22 Floating Point Representation Representation: sign, exponent, significand: (–1) sign  x significand x  2 exponent more bits for significand gives more accuracy more bits for exponent increases range IEEE 754 floating point standard: single precision: 8 bit exponent, 23 bit significand double precision: 11 bit exponent, 52 bit significand Need to worry about underflow, i.e., a number too small to be represented by floating point expression.

23 IEEE 754 floating-point standard Leading “1” bit of significand is implicit Exponent is “biased” to make sorting easier all 0s is smallest exponent all 1s is largest bias of 127 for single precision and 1023 for double precision summary: (–1) sign x  significand) x  2 exponent – bias Example: decimal: -.75 = -3/4 = -3/2 2 binary: -.11 = -1.1 x 2 -1 floating point: exponent = -1+127 = 126 = 01111110 IEEE single precision: 10111111010000000000000000000000

24 Converting Binary to Decimal Floating Point 1 1000001 01 0000…00 Sign bit =1 Exponent = 129 Significand = 1x2^-2 = 0.25 Decimal value = (-1)^1(1+0.25)x2^(129-127) =-5.0

25 Representing 0 in IEEE 754 standard Smallest single precision normalized number = 1.000000…00 x 2^(-126) Leading “1” bit of significand is implicit except for the value 0. Reserve exponent value 0 for zero so that the hardware won’t attach a leading 1 to it.

26 Floating Point Addition Decimal example: 9.999x10^1 + 1.610x 10^- 1 Step 1: Align the decimal point Step 2: Add significands Step 3: Convert to normalized form, check for underflow or overflow Step 4: Round the resulting significand

27 Floating-Point Addition

28 Block Diagram of Floating-Point Addition Unit

29 Floating-Point Multiplication Example: 1.110x10^10x9.200x10^-5 Step 1: Add the exponent (then -127 since bias is counted twice) Step 2: Multiply the two significands Step 3: Normalized the result, check for underflow or overflow Step 4: Round the resulting significand Step 5: Determine the sign

30 Floating-Point Multiplication

31 Floating-Point Instructions in MIPS Addition: add.s, add,d Subtraction: sub.s, sub.d Multiplication: mul.s,mul.d Division: div.s, div.d Comparison c.x.s or c.x.d where x may be eq, neq, lt, le, gt,ge Branch: bclt (branch true), bclf (branch false) Separate registers for floating-point operations

32 Floating Point Complexities Operations are somewhat more complicated In addition to overflow we can have “underflow” Accuracy can be a big problem IEEE 754 keeps two extra bits, guard and round four rounding modes positive divided by zero yields “infinity” zero divide by zero yields “not a number” other complexities Implementing the standard can be tricky Not using the standard can be even worse see text for description of 80x86 and Pentium bug!

33 Rounding with Guard Digits Add 2.56x10^0 to 2.34x10^2, assuming we have 3 significant decimal digits With guard and round bits: (2.3400 + 0.0256) Without guard and round bits GuardRound

34 Fallacies and Pitfalls Floating point addition is associative, i.e, x+(y+z) = (x+y)+z Counter example: -1.5x10^38+ (1.5 x10^38+1) Right shit is the same as an integer division by a power of 2: true for unsigned integers.

35 Summary Computer arithmetic is constrained by limited precision Bit patterns have no inherent meaning but standards do exist two’s complement IEEE 754 floating point Computer instructions determine “meaning” of the bit patterns Performance and accuracy are important so there are many complexities in real machines (i.e., algorithms and implementation).


Download ppt "Chapter 3 Arithmetic for Computers. Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let's."

Similar presentations


Ads by Google