1. Software-defined Radio using Xilinx Anton S. Rodriguez, Michael C. Mensinger, Jr. Advisors: Dr. In Soo Ahn and Dr. Yufeng Lu Department of Electrical and Computer Engineering Bradley University, Peoria IL 61625

2. Outline  Motivation  Project Goals  Equipment  QPSK Theory  Background  System Block Diagram  Requirements  Results  Conclusions  References

3. Motivation  A Software-defined Radio (SDR) provides a versatile wireless communication solution for a wide range of applications.  Applications: Cell phonesCell phones Military radiosMilitary radios GPSGPS Wi-FiWi-Fi  The SDR can be easily modified to the operating needs of individual applications.  Lower costs No expensive equipment No need to replace hardware

4. Project Overview  The objective of this project is to design a communication radio system on an FPGA board.  QPSK modulation scheme is used.  The main focus is on the carrier synchronization and phase ambiguity correction from the received data.  A Simulink model of the entire system is designed and then implemented on the SignalWave Virtex-II FPGA board.

5. Project Goals  Gain an in-depth understanding about the FPGA implementation of carrier synchronization.  Achieve fast acquisition of carrier synchronization.  Construct a working Simulink model.  Implement the Simulink model on an FPGA board.  Correct the phase ambiguity present in the recovered data.

6. Equipment  Virtex 4 FPGA  Xilinx - ISE 9.2 Compiler  SignalWave Virtex-II FPGA

7. QPSKSignalRepresentation QPSK Signal Representation 2 bits 2 bits  s(t) = I(t)*cos(2πf o t) – Q(t)*sin(2 πf o t) = A*cos(2πf o t + θ(t)) I Q θ(t)I(t)Q(t) π/411 3π/41 5π/4 7π/41

8. Background  Previous QPSK Project  Objectives: Make this system wirelessMake this system wireless Overcome the following communication problems:Overcome the following communication problems:  Multi-path effect  Carrier synchronization  Phase ambiguity

9. Multi-pathEffect Multi-path Effect   Random process.   A number of different paths may be traveled.   Constructive/destructive interference. AB α 1 *x(t- τ 1 ) α 2 *x(t- τ 2 ) α 3 *x(t- τ 3 )

10. Carrier Synchronization  Wireless communication introduces distortion due to channel imperfections.  The carrier signals must be synchronized to decode data correctly for both I & Q channels.

11. Phase Ambiguity  Typical problem in QPSK systems.  Due to the nature of phase- locking characteristics, a static phase error is introduced. I I Q Q Transmitted and decoded in-phase data

12. Outline  Motivation  Project Goals  Equipment  QPSK Theory  Background  System Block Diagram  Requirements  Results  Conclusions  References

13. System Block Diagram (Simulink Model) Channel

14. BasebandSignalShaping Baseband Signal Shaping   Raised-cosine filtering   Reduces inter-symbol interference (ISI)   Interpolator/Decimator

15. Interpolator

16. Decimator

17. System Block Diagram (Simulink Model) Channel

18. Phase-Locked Loop Corrected Signal + - (Carrier Recovery)

19. Functional Requirements  System clock = 50 MHz  Carrier signal frequency = 12.5 MHz Data rate = 12.5 MbpsData rate = 12.5 Mbps  The frequency offset tolerance is 1 kHz.

20. (Carrier Synchronization) Results QPSK signal I & Q waveforms

21. Results (Phase Ambiguity) Transmitted Image Received Image

22. Results  Differential coding (Phase Ambiguity Correction) Channel

23. Results (No Phase Ambiguity / Color) Transmitted Image Received Image

24. Results (Preserved data / Color)

25. Conclusions  QPSK wireless communication system is designed Simulink model is constructedSimulink model is constructed Carrier synchronization is achieved using digital PLLCarrier synchronization is achieved using digital PLL Phase ambiguity is resolved using differential codingPhase ambiguity is resolved using differential coding Tested whole system with real dataTested whole system with real data Hardware implementationHardware implementation  Demonstrated the configurability of a software-defined radio Expandable to MPSK, MQAM and other modulation schemesExpandable to MPSK, MQAM and other modulation schemes

26. Future Work  Symbol timing  Error correcting capabilities  Implement other modulation schemes 8PSK8PSK 16PSK16PSK and so on…and so on…

27. Acknowledgements  Dr. Yufeng Lu  Dr. In Soo Ahn  Senior Project Support from Department of Electrical and Computer EngineeringDepartment of Electrical and Computer Engineering Bradley University, Peoria IL 61625

28. Questions? Thank you

29. References  Chris Dick, Fred Harris, and Michael Rice, FPGA Implementation of Carrier Synchronization for QAM Receivers, Journal of VLSI Signal Processing, Copyright © 2004 Kluwer Academic Publishers, Netherlands.  Stephens, Donald R. Phase-locked loops for wireless communications digital and analog implementation. Boston: Kluwer Academic, 1998.  Vinod Kumar Venkat Reddy Gari, “FPGA-based QPSK transceiver design”, Technical Report, Department of Electrical and Computer Engineering, Bradley University, November 2008.  Altera Corporation, "PLL & Clocking Glossary," Altera, 1995-2010. [Online]. Available: http://www.altera.com. [Accessed: May 1, 2010].