1. Usage of System C Marco Steffan 0215884

2. Overview Standard Existing Tools Companies using SystemC

3. Common Standards Open SystemC Initiative (OSCI) IEEE 1666-2005 Standard SystemC Language Reference Manual (LRM) Members Intel, ARM, Cadence, CoWare, Synopsys, STMicroElectronics Canon, NEC, Infineon

4. Tools Forte Design Systems: CynthesizerCynthesizer Synopsys: System StudioSystem Studio Veritools (Verilator) Veritools CISC Semiconductor Design+Consulting GmbH: System Architect Designer (SyAD)System Architect Designer (SyAD) Mentor Graphics Candence

5. Companies using SystemC Nokia Infineon Technology AG Motorola Intel HP Texas Instruments

6. Nokia Modelling networks on mobile platforms Basic block approach (like LEGO) Combine blocks (SpaceWire) Build own Network-Simulator from scratch Start with SystemC 2.0.1 Extended to mySystemC

7. Infineon Technology AG Impact of different Datatypes on performance Appropriate type-selection gains 2x and more simulation speed improvements Available libraries provide almost all needed features Gcc-version has almost no impact on speedup

8. Motorola Early systems architecture exploration Corner case study Design change impact evaluation

9. Calls for Improvement (Motorola) Enhance model components portability Data flow interface Generic TLM bus interface preserving accuracy and providing flexibility in bus models selection Inter-module functional communication and simulation flow control Off-module process triggering and dynamic parameters sharing User interface Model components configuration Simulation result representation User-friendly

10. Intel Modeling interconnect & non-processor components Architecture models (“Architect’s View”) Functional models (“Programmer’s View”) Above are mixed and integrated with processor models for: Architecture exploration Early software development Early (post-Si) system validation readiness Early RTL verification Testbench* and test development (with ESL DUT) Application of system-level stimulus Co-simulation Co-emulation * Testbenches primarily developed in SystemVerilog

11. HP SystemC Usage RTL Verification Modeling (UTF,TF, BA/CA) System Simulation (no RTL) FW development on SW model Architectural Verification Deployment of System Verilog Applications Enterprise Level Servers Embedded Processors ASSP’s Algorithms (FFT, DCT, Wireless, etc.) Reasons for SystemC: Non proprietary, IEEE Std., LRM Industry Support TLM, AVM, SCV, etc. Proven capabilities Cost Effective

12. Calls for Improvement (HP) Mixed Signal Libraries Topology / Configuration generation (similar to generate function) More Academic Proliferation Keep entry price low (benefits start ups, small companies) More industry donations Tools to support higher abstraction (formal verification, advanced assertions) Increase interactions with System Verilog(common TLM API’s?)

13. Texas Instruments Usage Areas: High level architectural modeling (PV/PVT) Low level architectural/SoC modeling (CC) Synthesis (experimental) Internal SystemC user group meetings Bus models, CPU models, peripheral models, configuration, statistics, debug

14. Call for Improvements (TI) SystemC has poor support for asynchronous events Interrups/resets/power-downs Cooperative co-routines/threads For full support would require every method and every thread to add async events to their sensitivity lists Possible to use, but very inconvenient Need kernel support

15. Conclusion Missing features / libraries Still in initial stage Not for every kind of simulation Personal impression: „Would like to use, but...“

16. Thank you!

17. References IEEE 1666 Standard http://standards.ieee.org/getieee/1666/download/1666-2005.pdf Tools http://www.asic-world.com/systemc/tools.html European SystemC Users Group http://www-ti.informatik.uni-tuebingen.de/~systemc/systemc.html Wikipedia.org http://en.wikipedia.org/wiki/Systemc ASIC-World http://www.asic-world.com/systemc/ SystemC Community http://www.systemc.org Mentor Graphics http://www.mentor.com/products/