1. Senior Project BY: Ricardo V. Gonzalez Advisor: Dr. Vinod B. Prasad

2. Data Mover Using Vlsi In L-Edit Testing in different CAD for functionality assurance

3. Objective zThe main objective is to acquire experience in asic design building a data mover with testable features to transfer data from the input to the output following a geometric algorithm. This type of design will require the use of CMOS technology and logic gate design to be fabricated into a chip

4. Table Of Content zBlock diagram zDesign equations zTwo bit example of a data mover zTiming control needed zTiming chart zComplete data mover (2 bit example) zDesigns of circuitry finished

5. Table Of Content (Continued) zUpdated progress zWork left to do zQuestion section

6. Block Diagram

7. Design Equations zData mover: zMemory a[2]; b[2]; c[2]. Inputs: x[2] zOutputs: z[2] z1 a x z2 c /a z3 b c[0], c[1] z4 c a v b z5 z = c

8. Two Bit Example

9. Timing Control Needed

10. Controller Circuit (Tested In Logicworks)

11. Controller Simulated In Logicworks

12. Control Circuit Designed In L-Edit

13. Controller Simulation In Pspice

14. D flip-flop designed in L-Edit

15. D flip-flop simulation in Pspice

16. And gate in L-Edit

17. And Gate simulation in Pspice

18. X Or Gate in L-Edit

19. Complete Data Mover (Two Bit Example)

20. Data Mover 2 Bit in L-Edit

21. Data Mover 4 Bit In L-edit

22. 4 Bit Data Mover Simulation In Pspice

23. Work Done So Far zResearched about the behavior of data mover circuit zDesigned controller circuit for timing zTested all gates and circuits zImplemented all circuits in L-EDIT

24. Work Left To Do zMake final connections from the design to the pad zResearch about more possible applications of this design zDesign a feasible application zSend design for fabrication zPrepare for expo 2001

25. Question Section zAny questions or comments?