1. Embedded Systems Programming
Introduction to ARM and StrongARM

2. Background to ARM ARM is short for Advanced Risc Machines Ltd
Founded 1990, owned by Acorn, Apple and VLSI
Before becoming ARM the chip designing company, was a computing manufacturer which developed a 32-bit RISC processor for the Acorn Archimedes.

3. What is RISC? What is RISC Overall faster, simpler processer
Reduced instructions –fixed length
Use of pipelines to breakdown and speed up processing
Large number of registers – used as very fast onboard RAM
Load-store architecture – must load and store from memory to register via special instructions
Overall faster, simpler processer

4. ARM and RISC
The ARM processors have many features in common with RISC chips – but is not pure RISC
Uses variable cycle instructions
In-line barrel shifter leads to complex instructions
Thumb mode – a 16 bit extension to ARM assembler
Conditional execution of instructions
Enhanced instructions – ie DSP instructions
ARM processors are well adapted to embedded, low power and mobile solutions

5. Why ARM?
ARM is one of the most widely licensed and used processor cores
2 billion+ in use
Especially good for low power mobile computing
Very good code density
Interesting extensions – Thumb instructions and Jazelle Java machine

6. ARM ISA and cores
ARM has developed a large number of different processor cores over the last decade.
The 2 distinguishing features are
The Instruction Set Architecture ISA
Changes but allows code compatibility between version – current version ARMv6
The processor core type
Core implementations from ARM1 to ARM11

7. ISA From ARMv1 ARMv3 ARMv4 ARMv6
26 bit external 32 bit internal architecture
ARMv3
32 bit
MMU support
ARMv4
Thumb
ARMv6
Multimedia instructions

8. ARM Cores ARM7 core ARM9 ARM11 Von Neumann architecture
3 stage pipeline
32 bit, MMU
ARM9
Harvard architecture
5 stage pipeline
Separate I + D caches
ARM11
Eight stage pipeline
SIMD extensions for media processing
Extra floating point support

9. Intel StrongARM

10. SA1110 features 32 bit RISC processor 133 - 206 MHz Control units
16KB I cache
8KB D cache
Control units
Memory and PCMCIA Control (MPCM)
PCMCIA, Flash, DRAM, SRAM, ROM
System Control Unit SCM
Clocks and interrupts
Peripheral Control Module
UART, IrDA, USB, LCD
Memory Management Unit
32 entry maps 4 Kbytes, 8 Kbytes or 1 Mbyte
Separate TLBs

11. Example StrongARM applications

12. SA1110 Block Diagram