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將電路版上振盪電路的輸出頻率,依需求除頻 本實驗將實作除2、4、8,並以LED燈顯示

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Presentation on theme: "將電路版上振盪電路的輸出頻率,依需求除頻 本實驗將實作除2、4、8,並以LED燈顯示"— Presentation transcript:

1 將電路版上振盪電路的輸出頻率,依需求除頻 本實驗將實作除2、4、8,並以LED燈顯示
實驗二 除頻器 (divider) 將電路版上振盪電路的輸出頻率,依需求除頻 本實驗將實作除2、4、8,並以LED燈顯示

2 除頻器 振盪器頻率 clk_2 除2 clk Divider clk_4 除4 reset rst clk_8 除8

3 除頻程式範例 module div(clk,rst,clk_2,clk_4,clk_8); input clk,rst;
output clk_2,clk_4,clk_8; reg cnt2; reg [1:0]cnt4; reg [2:0]cnt8; wire clk_2,clk_4,clk_8; (posedge clk or negedge rst) if (!rst) begin cnt2<=0;cnt4<=0;cnt8<=0;end else begin cnt2<=cnt2+1;cnt4<=cnt4+1;cnt8<=cnt8+1;end assign clk_2=cnt2; assign clk_4=cnt4[1]; assign clk_8=cnt8[2]; endmodule

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5 Pin & Location Assignments
set_location_assignment PIN_29 -to clk set_location_assignment PIN_165 -to clk_1 set_location_assignment PIN_166 -to clk_2 set_location_assignment PIN_167 -to clk_4 set_location_assignment PIN_168 -to clk_8 set_location_assignment PIN_240 -to rst Note: 程式須要修改增加clk_1(原頻率)

6 修改後程式 module div(clk,rst,clk_2,clk_4,clk_8); input clk,rst;
output clk_2,clk_4,clk_8; reg cnt2; reg [1:0]cnt4; reg [2:0]cnt8; wire clk_2,clk_4,clk_8; (posedge clk or negedge rst) if (!rst) begin cnt2<=0;cnt4<=0;cnt8<=0;end else begin cnt2<=cnt2+1;cnt4<=cnt4+1;cnt8<=cnt8+1;end assign clk_1=rst&clk; assign clk_2=cnt2; assign clk_4=cnt4[1]; assign clk_8=cnt8[2]; endmodule

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