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CS 140 Lecture 8 Professor CK Cheng 4/26/02. Part II. Sequential Network 1.Memory SR, D, T, JK, 2.Specification S XY s i t+1 = g i (S t, X t )

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Presentation on theme: "CS 140 Lecture 8 Professor CK Cheng 4/26/02. Part II. Sequential Network 1.Memory SR, D, T, JK, 2.Specification S XY s i t+1 = g i (S t, X t )"— Presentation transcript:

1 CS 140 Lecture 8 Professor CK Cheng 4/26/02

2 Part II. Sequential Network 1.Memory SR, D, T, JK, 2.Specification S XY s i t+1 = g i (S t, X t )

3 Example with D flip-flops x Q1Q1 Q0Q0 D Q Q’ D Q y Q0Q0 Q1Q1 D0D0 D1D1 y(t) = Q 1 (t)Q 0 (t) Q 0 (t+1) = D 0 (t) = x(t)Q 1 (t) Q 1 (t+1) = D 1 (t) = x(t) + Q 0 (t)

4 0 0 1 1 0 1 PS inputs x=0 x=1 State table 00, 0 10, 0 10, 0 00, 0 11, 0 10, 0 11, 1 Q 1 (t) Q 0 (t) Q 1 (t+1) Q 0 (t+1), y(t) Q1Q0Q1Q0 x Q 1 (t) Q 0 (t) Q 1 (t+1) Q 0 (t+1) y(t) (can derive from state table) s0s1s2s3s0s1s2s3 PS inputs 0 1 s 0, 0 s 2, 0 s 2, 0 s 0, 0 s 3, 0 s 2, 0 s 3, 1 Let: s 0 = 00 s 1 = 01 s 2 = 10 s 3 = 11 ( Let’s remake the state table using symbols instead of binary code, e.g. ’00’)

5 State Diagram s1s1 s2s2 s3s3 s0s0 0,1 1 0 1 0 0 1 Example Run (sequence of inputs and outputs) Time0 1 2 3 4 5 6 Input0 0 1 1 1 0 1 State s 0 s 0 s 0 s 2 s 2 s 3 s 2 Output 0 0 0 1 1 0 1

6 Reminder D flip-flop: Q(t+1) = D(t) T flip-flop: Q(t+1) = Q(t) T’(t) + Q’(t) T(t) JK F-F: Q(t+1) = J(t) Q’(t) + K’(t) Q(t) SR F-F: Q(t+1) = Q(t) R’(t) + S(t) 0 0 0 1 - 1 1 0 1 - 00 01 10 11 SR Q(t) 0 2 6 4 1 3 7 5 R Q S 0 0 - 1 1 0 - 1 Example w/ SR F-F:

7 Example with T flip-flops X Q1Q1 Q0Q0 T Q Q’ T Q y Q0Q0 Q1Q1 T0T0 T0T0 y(t) = Q 1 (t)Q 0 (t) Q 0 (t+1) = T 0 (t) = X(t) Q 1 (t) Q 1 (t+1) = T 1 (t) = X(t) + Q 0 (t)

8 0 0 0 1 1 0 1 PS inputs x=0 x=1 State table 00, 0 10, 0 10, 0 00, 0 11, 0 10, 0 11, 1 Q 1 (t) Q 0 (t) Q 1 (t+1) Q 0 (t+1), y(t) id Q 1 (t) Q 0 (t) X(t) T 1 (t) T 0 (t) Q 1 (t+1) Q 0 (t+1) 0 0 0 0 1 0 0 1 1 0 1 0 2 0 1 0 1 0 1 1 3 0 1 1 1 0 1 1 4 1 0 0 0 0 1 0 5 1 0 1 1 1 0 1 6 1 1 0 1 0 0 1 7 1 1 1 1 1 0 0 000111 10 0 1 0 0, 1 1 1 All three forms are equivalent. Given one, we can derive the other ones.

9 011000 0/0 1/0 0/0 Examples going the other way Given the state diagram 1/1 1/0 s0s0 s1s1 s2s2 Input1 1 0 0 1 0 1 1 0 1 0 1 0 State s 0 s 1 s 1 s 2 s 3 s 1 s 2 s 1 s 1 s 2 s 1 s 2 s 1 Output 0 0 0 0 0 0 1 0 0 1 0 1 0 This outputs 1 only on input sequence 101


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