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Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker.

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Presentation on theme: "Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker."— Presentation transcript:

1 Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker

2 Signed Numbers (3bits) sign magnitudeone’s complementtwo’s complement 000 2 = 0 001 2 = 1 010 2 = 2 011 2 = 3 100 2 = -0100 2 = -3100 2 = -4 101 2 = -1101 2 = -2101 2 = -3 110 2 = -2110 2 = -1110 2 = -2 111 2 = -3111 2 = -0111 2 = -1

3 Two’s complement The unsigned sum of an n-bit number with its negative yields? Example with 3 bits: 011 2 = 3 101 2 = -3 1000 2 = 2 n => negate(x) = 2 n -x 101 2 = -2 2 + 2 0

4 Negating Signed Integers Suppose that you have an n-bit integer in two’s complement representation Negate positive to negative: 0011 2 = 3  1101 2 = -3 invert bits and add 1 Negate negative to positive Trick: invert bits and add 1 -3 = 1101 2  0010 2  0011 2

5 Just like in grade school (carry/borrow 1s) 0111 0111 0110 + 0110- 0110- 0101 1101 0001 0001 Two's complement operations easy subtraction using addition of negative numbers 0111 = 7 + 1010 = -6 0001 Addition & Subtraction

6 Detecting Overflow OperationOperand AOperand BOverflow if result A+B>=0 <0 A+B<0 >=0 A-B>=0<0 A-B<0>=0

7 MIPS instructions lb loads a byte and stores the sign- extended version in a word. lbu loads a byte and stores it in a word Which of these two is typically used to process characters?

8 Logic Gates: AND AND a b c 0 0 0 0 1 0 1 0 0 1 1 1 a b c

9 Logic Gates: OR OR a b c 0 0 0 0 1 1 1 0 1 1 1 1 a b c

10 Let's build an ALU to support the andi and ori instructions Selection of operation 0 = and, 1 = or we'll just build a 1 bit ALU, and use 32 of them Possible Implementation (sum-of-products): b a operation result An ALU (arithmetic logic unit)

11 Selects one of the inputs to be the output, based on a control input Build (and/or) ALU using a MUX S C A B 0 1 The Multiplexor note: it is called a 2-input mux even though it has 3 inputs!

12 Not easy to decide the “best” way to build something Don't want too many inputs to a single gate for our purposes, ease of comprehension is important Don’t want to have to go through too many gates Let's look at a 1-bit ALU for addition: Different Implementations c out = a b + a c in + b c in sum = a xor b xor c in

13 Different Implementations How could we build a 1-bit ALU for add, and, and or? How could we build a 32-bit ALU?

14 Building a 32 bit ALU

15 Two's complement approach: just negate b and add. How do we negate? A solution: What about subtraction (a – b) ?


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