1. Cryo and AFE IIt Update MICE Collaboration Meeting October 22, 2005 RAL A. Bross

2. Cryo Update I  The cryo-system for the VLPCs has been operated extremely reliably and stably from May through the end of the KEK TB  However, it was felt that the thermal-link design could be made more robust u A bolted concept has now been detailed and will be used in all subsequent systems  The drawing package has been “marked-up” for update  The drawing package is currently in the Fermilab drafting queue.  There are a few outstanding issues that still need some thought u Is the top plate stiff enough against atmospheric pressure? u Can the new thermal link design permit non-positive clamping of the cassette so that a cassette could be removed from the cryostat without having to break the cryo-vacuum

3. Cryo Update II

4. AFE IIt Update  The AFE IIt prototypes (10) have arrived and are under test  The production run of Tript chips is complete, and approximately 8200 die have been packaged. u Enough for about 500 boards

5. AFE IIt

6. AFE IIt test Status  The AFE IIt board test is making very good progress u All power applied (AFEI power supply values) u 1553 communications functional u JTAG programming chain working u RT1553 FPGA operating properly u PIC microcontroller operating properly using new C code (at least for those tests we have performed so far) u HELPER FPGA operating properly for the functions we have checked so far u CLOCKGEN FPGA operating properly, clocks being generated, phase control from the PC, through 1553 is working properly. u Program and read the FLASH memory u Use the FLASH to program the DFPGAs u Use the FLASH to program the AFPGAs u ADC for measuring bias and temp is working u Bias DACs, heater DACs are working  Next Steps u Test the slow communications to AFPGAs and DFPGAs u Apply power to TriP-t chips and ADCs u Run the TriP-t and ADCs through the ACQUIRE/DIGITIZE/READOUT cycle  Lots of FPGA programming to Do!

7. TriPt  We now have all the packaged TriPts that will be needed  Preliminary testing: u Linearity problem at small charge input has indeed been fixed

8. TriPt II  Bandwidth performance looks good

9. TriPt III  Discriminator Performance as expected u Likely not an issue with MICE

10. TriPt IV  TDC Gain has large spread u This was expected and can be taken out (calibration) off-line

11. TriPt V  Time-walk as expected.

12. Issues that will Need some Thought  AFE IIt board temperature and bias calibration u Does MICE need a test stand (like D0 has) to do this operation?  LED pulser data u Plan to dismount wavguides and mount a LED pulser or excite the fibers with blue LEDs?  New LVSB Board  AVNET (timing) board incorporated into LVSB or possibly the AFE IIt can be programmed to take over the functionality of the AVNET board  Rate u If we keep analog and timing information we are limited to:  1/(150 X 19 ns)  350 muons per msec of spill –It is possible that clever (extreme) programming of the AFE IIt can push this up a bit – 400-450 or so. u If we drop analog and timing and only use discriminators, we can run at 7 MHz.