1. xlab.me.berkeley.edu Xlab Confidential – Internal Only EE235 Carbon Nanotube FET Volker Sorger

2. xlab.me.berkeley.edu xlab.me.berkeley.edu 2 Xlab Confidential – Internal Only CNT-FET

3. xlab.me.berkeley.edu xlab.me.berkeley.edu 3 Xlab Confidential – Internal Only metal i or p - gate sourcedrain SBFET Schottky Barrier (SB) CNT FET Transistor “Carbon nanotubes as Schottky barrier transistors” Heinze et al., PRL, 89, 106801, 2002 Appenzeller et al., PRL, 89, 126801, 2002 Tunneling limited current. Gate electrostatics will control the tunneling barrier. Gate 8nm HfO 2 SiO 2 p++ Si Pd CNT Javey, et al., Nano Letters, 4, 1319, 2004

4. xlab.me.berkeley.edu xlab.me.berkeley.edu 4 Xlab Confidential – Internal Only n+n+ n+n+ i or p - gate sourcedrain MOSFET MOS CNT FET Transistor Electrons do not see any tunneling barrier in the “on” state. Gate electrostatics control the top-of-the-barrier. Appenzeller et al., IEDM, 2004 Javey et al., Nano Letters, 5,2, 2005

5. xlab.me.berkeley.edu xlab.me.berkeley.edu 5 Xlab Confidential – Internal Only CNTs: Best Case Scenario Current CNT array FET I per tube ~ V DD / 6.5Kohms ~150uA (@V DD = 1V) Take d = S = 1nm; I per gate width ~ 500 X 150uA/um ~ 75mA/um (+non-idealities) I silicon ~ 1mA/um Capacitance C OXIDE C SEMI Physics: Low DOS makes band pinning difficult. Intuitively: Not enough electrons to screen the gate E-field. Circuits: C OXIDE >~ C SEMI C per tube <~ 1-5 aF (@Length=50nm) C per gate width ~ 500 X 2aF/um ~ 1fF/um C silicon ~ 1fF/um C interconnect ~ 0.3fF/um (does not scale) C (per unit micron of width) = 1X I (per unit micron of width) = 50X T DELAY (for same transistor width) = 0.02X

6. xlab.me.berkeley.edu xlab.me.berkeley.edu 6 Xlab Confidential – Internal Only Work function Engineering for SB-FETs What device can we built with this finding now?! M. H. Yang, W. I. Milne, APL, 2005 Work function: 5.12eV 4.33eV~3.9eV Ec Ev Ef ssss Ec Ev Ef ssss Ec Ev Ef ssss P-typeintrinsic N-type

7. xlab.me.berkeley.edu xlab.me.berkeley.edu 7 Xlab Confidential – Internal Only SB Diode

8. xlab.me.berkeley.edu xlab.me.berkeley.edu 8 Xlab Confidential – Internal Only 1-D Device Basics  What we want! –High I on  speed –Low I off  less leakage –Steep switching  small Subthreshold swing, SS –High mobility,   How can we archive this? –I on : Ohmic contacts + big tube –I off : high quality t ox, small tube –SS: good gate coupling = small t ox =4pF/cm Hole mobility Si480 Ge1900 GaAs400 CNT~3000

9. xlab.me.berkeley.edu xlab.me.berkeley.edu 9 Xlab Confidential – Internal Only Intrinsic Gate Delay CV/I for PMOS R. Chau, IEEE Nanotechnology, 2005

10. xlab.me.berkeley.edu xlab.me.berkeley.edu 10 Xlab Confidential – Internal Only CV/I versus I on /I off Ratio

11. xlab.me.berkeley.edu xlab.me.berkeley.edu 11 Xlab Confidential – Internal Only Conclusion  CNT have potential  Devices can keep up with state-of-the-art Si  Still 3 major challenges to overcome (Integration) ~~~ Thank you for you attention ~~~

12. xlab.me.berkeley.edu xlab.me.berkeley.edu 12 Xlab Confidential – Internal Only CNT-FET Benchmarking  Intrinsic Speed: CV/I vs. L g  SS vs. L g  Speed vs. I on /I off  Metrology –I=I on (@ V g = V t + 2/3 V DS ) –I=I on (@ V g = V t – 1/3 V DS ) –V=V cc =V g =|V DS | –Device width = 2R –V t from standard peak conductance R. Chau, IEEE Nanotechnology, 2005