Download presentation
Presentation is loading. Please wait.
1
EVOHAR Robustness in Evolved Hardware Jason Masner, John Cavalieri Dr. James Frenzel and Dr. James A. Foster
2
Acknowledgements This work is funded in part through the Center for Secure and Dependable Software Microelectronics Research and Communications Institute DOD/OST BMDO We are grateful for the help and support of these organizations
3
Outline Motivation Sorting Networks Tree Representation Linear Representation Intrinsic Representation Error Introduction Some BS Data Future Work
4
Motivation Study an apparent intrinsic property of evolved systems - ability to degrade gracefully with the presence of local failures. (Robustness for free)
5
Inputs Sorting Network Output 0 1 1 0 0 1 1 0 0 1 0 1 0 1 1 1 1 1 0 0
6
Inputs Sorting Network Output 1 0 1 1 1 0 1 1 1 0 1 1 1 1 1 1 0 1
7
Compare Exchange Circuit AND OR 1 0 Input 0 1 Output
8
CE (1,4) CE (0,4)CE (0,3) CE (1,3)CE (1,2) CE (2,4)CE (0,2) CE (3,4) TREE Structure CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4) …. ARRAY Structure Individuals
9
Our Xilinx FPGA Cells ….. 64 Inputs 0 1 1 0 0 0 1 1
10
Tree Crossover 1. Two nodes are randomly chosen on each tree. 2. Nodes and subtrees are swapped.
11
Tree Crossover 1. Two nodes are randomly chosen on each tree. 2. Nodes and subtrees are swapped.
12
Tree Crossover 1. Two nodes are randomly chosen on each tree. 2. Nodes and subtrees are swapped.
13
Tree Mutation 1. Two nodes are randomly chosen. 2. Nodes and subtrees are swapped.
14
Tree Mutation 1. Two nodes are randomly chosen. 2. Nodes and subtrees are swapped.
15
Tree Mutation 1. Two nodes are randomly chosen. 2. Nodes and subtrees are swapped.
16
Representation of Individuals CROSSOVER in Arrays CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4)CE (2,3)CE (1,4)CE (1,2) CE (0,3)CE (3,4)CE (0,2)CE (1,3)CE (2,3)CE (1,2)CE (0,3)CE (0,1)
17
Representation of Individuals CROSSOVER in Arrays CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4)CE (2,3)CE (1,4)CE (1,2) CE (0,3)CE (3,4)CE (0,2)CE (1,3)CE (2,3)CE (1,2)CE (0,3)CE (0,1) CE (1,4)CE (0,3)CE (2,3)CE (1,4)CE (1,2) CE (0,3)CE (3,4) CE (0,2)CE (1,3)CE (2,3) CE (1,2)CE (0,3)CE (0,1)CE (1,3)CE (2,4)CE (0,4)
18
Representation of Individuals MUTATION in Arrays CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4)CE (2,3)CE (1,4)CE (1,2)
19
Representation of Individuals MUTATION in Arrays CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4)CE (2,3)CE (1,4)CE (1,2) CE (1,4)CE (0,3)CE (1,3)CE (2,4)CE (0,4)CE (2,3)CE (1,4)CE (1,2)
20
Errors: Pass-Through AND OR 1 0 Input 0 1 Output 1
21
Error: Stuck on One AND OR 1 0 Input 0 1 Output 1
22
Error: Stuck on Zero AND OR 1 0 Input 0 1 Output 0
23
Error Types and Bit Stability Rating Pass-ThroughStuck on ZeroStuck on One MSN Tree Linear * indicate tendency of a bit to survive uncorrupted through a given network with given set of faults. All errors
24
EVOLUTION BUILDS BETTER CIRCUITS
25
Future Work Testing on different networks Apply the our BS to different data or problems Hillclimber as a control factor Implement in hardware
26
Error Types and Bit Stability Value Pass-ThroughStuck on ZeroStuck on One MSN Tree Linear Numbers indicate tendency of a bit to survive uncorrupted through a given network with given set of faults. All errors
27
Evolutionary Advantages Fast Design Time Less Costly to Develop Generalize Well Evolutionary Circuits are more Robust
Similar presentations
© 2025 SlidePlayer.com. Inc.
All rights reserved.