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Eric Allender Rutgers University Chipping Away at P vs NP: How Far Are We from Proving Circuit Size Lower Bounds? Joint work with Michal Koucky ʹ Czech Academy of Sciences
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 2 >< 2 > Introduction How far are we from proving circuit lower bounds? I have no idea! There is a lot of pessimism, based on – The lack of any good circuit lower bounds – The [Razborov,Rudich] “natural proofs” obstacle Today, we’ll make some observations that may cause some of you to be less pessimistic.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 3 >< 3 > But First…Why Circuits? 2 Basic models of computation – Programs (one program – works for every input length) – Circuits (different circuit for each input length) One crucial difference: circuit lower bounds can be used to prove intractability results for fixed input sizes. Program run-time lower bounds can’t.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 4 >< 4 > An example: the Game of Checkers Computing strategies for Checkers requires exponential time. – More precisely, given an n -by- n Checkers board with checkers on it, no program can compute an optimal next move in fewer than c 2 n – d steps, for some constants c and d. – n -by- n Checkers is complete for EXP.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 5 >< 5 > An example: the Game of Checkers Computing strategies for Checkers requires exponential time. – More precisely, given an n -by- n Checkers board with checkers on it, no program can compute an optimal next move in fewer than c 2 n – d steps, for some constants c and d. – Thus any program solving this problem must run very slowly on large inputs. This is the essence of asymptotic analysis.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 6 >< 6 > An example: the Game of Checkers Computing strategies for Checkers requires exponential time. – More precisely, given an n -by- n Checkers board with checkers on it, no program can compute an optimal next move in fewer than c 2 n – d steps, for some constants c and d. – This is a much stronger statement about complexity than we are able to prove for most problems (such as NP-complete problems).
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 7 >< 7 > An example: the Game of Checkers Computing strategies for Checkers requires exponential time. – More precisely, given an n -by- n Checkers board with checkers on it, no program can compute an optimal next move in fewer than c 2 n – d steps, for some constants c and d. – but…Conceivably, there is a hand-held device that computes optimal moves, even for Checker boards of size 1000-by-1000! – …because we don’t know if EXP is in P/poly (the class of problems with small circuits).
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 8 >< 8 > An Example of what can be done, given a circuit size lower bound Theorem: Any circuit that takes as input a logical formula (in WS1S) of length 616 and produces as output a correct answer, saying if the formula is valid or not, has at least 10 123 gates. (Stockmeyer, 1974) (Proof sketch): There is a problem requiring exponential circuit size that is efficiently reducible to WS1S.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? < 9 >< 9 > An Example of what can be done, given a circuit size lower bound Theorem: Any circuit that takes as input a logical formula (in WS1S) of length 616 and produces as output a correct answer, saying if the formula is valid or not, has at least 10 123 gates. (Stockmeyer, 1974) What we need: Similar lower bounds, but for problems in NP such as SAT or FACTORING. We would even be glad to get lower bounds for restricted classes of circuits.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Big Complexity Classes NP PP .. .. NC L (Deterministic Logspace)
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? TC 0 O(1)-Depth Circuits of MAJ gates AC 0 [6] NC 1 Log-Depth Circuits AC 0 can’t compute Mod 2 [FSS,A] AC 0 O(1)-Depth Circuits of AND/OR gates The Main Objects of Interest: Small Complexity Classes
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? TC 0 O(1)-Depth Circuits of MAJ gates AC 0 [6] NC 1 Log-Depth Circuits AC 0 can’t compute Mod 2 [FSS,A] AC 0 O(1)-Depth Circuits of AND/OR gates The Main Objects of Interest: Small Complexity Classes
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? TC 0 O(1)-Depth Circuits of MAJ gates NC 1 Log-Depth Circuits AC 0 [2] can’t compute Mod 3 [R,S] AC 0 [2] AC 0 O(1)-Depth Circuits of AND/OR gates The Main Objects of Interest: Small Complexity Classes
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? NC 1 Log-Depth Circuits TC 0 O(1)-Depth Circuits of MAJ gates AC 0 [6] AC 0 [2] AC 0 O(1)-Depth Circuits of AND/OR gates The Main Objects of Interest: Small Complexity Classes
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? NC 1 poly-size formulae TC 0 O(1)-Depth Circuits of MAJ gates AC 0 [6] AC 0 [2] AC 0 O(1)-Depth Circuits of AND/OR gates The Main Objects of Interest: Small Complexity Classes
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? NP has complete sets (under polynomial time reducibility ≤ P ) These small classes have complete sets, too (under ≤ AC° ) Complete Problems
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Reductions A ≤ AC° B means that there is a constant-depth circuit computing A that has the usual AND and OR gates, and also has ‘oracle gates’ for B. B
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? NC 1 TC 0 AC 0 [6] AC 0 [2] AC 0 Complete Problems sorting, multiplication, division [Naor,Reingold] Pseudorandom Generator
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? NC 1 TC 0 AC 0 [6] AC 0 [2] AC 0 Complete Problems BFE: Balanced Boolean Formula Evaluation (AND,OR,XOR) Word problem over S 5
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? The Word Problem Over S 5 A regular set complete for NC 1 =
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Complexity Classes are not Invented – They’re Discovered NP (SAT, Clique, TSP,…) P (Linear Programming, CVP, …) NL (Connectivity, Shortest Paths, 2SAT, …) L (Undirected Connectivity, Acyclicity, …) NC 1 (BFE, Regular Sets) TC 0 (Sorting, Multiplication, Division) We’re interested in NC 1 (for instance) not because we want to build formulae for these functions…
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Complexity Classes are not Invented – They’re Discovered NP (SAT, Clique, TSP,…) P (Linear Programming, CVP, …) NL (Connectivity, Shortest Paths, 2SAT, …) L (Undirected Connectivity, Acyclicity, …) NC 1 (BFE, Regular Sets) TC 0 (Sorting, Multiplication, Division) … but because we want to know if the blocks of this partition are distinct.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Complexity Classes are not Invented – They’re Discovered NP (SAT, Clique, TSP,…) P (Linear Programming, CVP, …) NL (Connectivity, Shortest Paths, 2SAT, …) L (Undirected Connectivity, Acyclicity, …) NC 1 (BFE, Regular Sets) TC 0 (Sorting, Multiplication, Division) These classes are real. They’re important.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? How far are we in this talk? We’ve explained why circuit lower bounds are important. …even for restricted classes of circuits. What is currently known about these classes?
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Longstanding Open Problems Is P = NP? Is AC 0 [6] = NP? Is depth 3 AC 0 [6] = NP? We’ll focus on questions such as : Is BFE in TC 0 ? Is BFE in AC 0 [6]?
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? How Close Are We to Proving Circuit Lower Bounds? Conventional Wisdom: Not Close At All! No new superpolynomial size lower bounds in over two decades. Razborov and Rudich: Any “natural” argument proving a lower bound against a circuit class C yields a proof that C can’t compute a pseudorandom function generator. Since the [Naor, Reingold] generator is computable in TC 0, this is bad news.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? More Modest Goals Problems requiring formulae of size n 3 [Håstad] Problems requiring branching programs of size nearly n loglog n [Beame, Saks, Sun, Vee] Problems requiring depth d TC 0 circuits of size n 1+ c [Impagliazzo, Paturi, Saks] Time-Space Tradeoffs [Fortnow, Lipton, Van Melkebeek, Viglas] There is little feeling that these results bring us any closer to separating complexity classes.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? How close are the following two statements? TC 0 Circuits for BFE must be of size n 1+Ω(1) TC 0 Circuits for BFE must be of size n 1+ c for some c >0 How Close Are We to Proving Circuit Lower Bounds?
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? How close are the following two statements? TC 0 Circuits for BFE must be of size n 1+Ω(1) TC 0 Circuits for BFE must be of size n 1+ c for some c >0 How Close Are We to Proving Circuit Lower Bounds? This is known [IPS’97] This implies TC 0 ≠ NC 1
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self-Reducibility A set B is said to be “self-reducible” if B ≤ P B
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self-Reducibility A set B is said to be “self-reducible” if B ≤ P B via a reduction that, on input x, does not ask about whether x is in B. Very well-studied notion. For example, φ is in SAT if and only if (φ 0 is in SAT) or (φ 1 is in SAT)
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self-Reducibility Many of the important problems in (or near) NC 1 have a special self-reducibility property:
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self-Reducibility Many of the important problems in (or near) NC 1 have a special self-reducibility property: Instances of length n are AC 0 -Turing (or TC 0 - Turing) reducible to instances of length n ½ via reductions of linear size. Examples: – BFE – the word problem over S 5 – MAJORITY – Iterated Product of 3-by-3 Integer Matrices
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self Reducibility BFE A subformula near the root Subformulae near inputs
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self Reducibility S5S5
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Self Reducibility The self-reduction of S 5, on inputs of size n, uses ( n ½ + 1) oracle gates of size n ½. Thus if S 5 has TC 0 circuits of size n k, it also has circuits of size ( n ½ + 1) n k/ 2 = O(n (k+ 1)/2 ). Similar arguments hold for other classes (such as AC 0 [6] and NC 1 ). More complicated self-reductions can be presented for MAJORITY and Iterated Product of 3-by-3 matrices.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? A Corollary If BFE has TC 0 or AC 0 [6] circuits, then it has such circuits of nearly linear size. If S 5 has TC 0 or AC 0 [6] circuits, then it has such circuits of nearly linear size. If MAJ has AC 0 [6] circuits, then it has such circuits of nearly linear size. (Etc.) Thus, e.g., to separate NC 1 from TC 0, it suffices to show that BFE requires TC 0 circuits of size n 1.0000001.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? A Corollary If BFE has TC 0 or AC 0 [6] circuits, then it has such circuits of nearly linear size. If S 5 has TC 0 or AC 0 [6] circuits, then it has such circuits of nearly linear size. If MAJ has AC 0 [6] circuits, then it has such circuits of nearly linear size. (Etc.) How widespread is this phenomenon? Is it true for SAT? (I.e., can we show NP ≠ TC 0 by proving that SAT requires TC 0 circuits of size n 1.0000001 ?)
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Limitations of Self-Reducibility Any problem for which instances of length n are TC 0 -Turing reducible to instances of length n ½ via poly-size reductions lies in NC. Thus there is no obvious way to apply these techniques to SAT or to problems complete for P. …but perhaps, rather than showing directly that SAT has this strong form of self- reducibility, one can argue that if SAT is in TC 0 then it has TC 0 circuits of nearly-linear size.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Limitations of Self-Reducibility Any problem for which instances of length n are TC 0 -Turing reducible to instances of length n ½ via poly-size reductions lies in NC.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Limitations of Self-Reducibility Any problem for which instances of length n are TC 0 -Turing reducible to instances of length n ½ via poly-size reductions lies in NC. d levels of oracle gates
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Limitations of Self-Reducibility Any problem for which instances of length n are TC 0 -Turing reducible to instances of length n ½ via poly-size reductions lies in NC. d 2 levels of oracle gates
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Limitations of Self-Reducibility Any problem for which instances of length n are TC 0 -Turing reducible to instances of length n ½ via poly-size reductions lies in NC. d 3 levels of oracle gates After log log rounds, the depth is log O(1) n
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Some Lower Bounds Recall that [IPS] showed: – TC 0 Circuits for BFE must be of size n 1+Ω(1) Thus SAT also requires TC 0 circuits of this size. The [IPS] bound actually shows that PARITY requires circuits of this size. We do NOT know similar bounds for AC 0 [6].
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? A Lower Bound for AC 0 [6] For every d there is an ε >0 such that SAT requires depth d AC 0 [6] circuits of size n 1+ ε The same proof shows that the same bound holds for TC 0.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? A Lower Bound for AC 0 [6] For every d there is an ε >0 such that SAT requires depth d AC 0 [6] circuits of size n 1+ ε If no such ε exists, then for all δ >0, SAT is in TimeSpace( n 1+ δ,n 1- δ ). This violates the time-space tradeoff results of [Van Melkebeek].
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? A Lower Bound for AC 0 [6] For every d there is an ε >0 such that SAT requires depth d AC 0 [6] circuits of size n 1+ ε If no such ε exists, then for all δ >0, SAT is in TimeSpace( n+n dδ,n 1- δ ). Hint of proof: Do a depth-first evaluation of the circuit, using the space bound to store the value of all gates having large fan-in (and re- computing all other values as needed).
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Prospects for Progress We have seen that existing techniques prove bounds that are “nearly” good enough to separate NC 1 and TC 0. Some of these proofs are “natural”. Don’t the results of [Razborov & Rudich] indicate that further progress will require very different approaches? Not necessarily!
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Prospects for Progress The [Razborov & Rudich] framework of natural proofs assumes that a “natural” proof of a lower bound will make use of a combinatorial property that (among other things) is shared by a large fraction of the functions on n bits. In contrast, we are making use of a self- reducibility property that allows us to boost a n 1+ ε lower bound to a superpolynomial lower bound. This self-reducibility property holds for only a vanishingly small fraction of all functions.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Prospects for Progress These observations are simple, but … they have forever changed the way that we look at quadratic (and smaller) lower bounds. We are not claiming to have found a way around the obstacles identified by [Razborov & Rudich]. (Such a claim will have to wait until someone proves that NC 1 ≠ TC 0.) But we do believe that this avenue deserves further exploration.
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Eric Allender: How Close Are We to Proving Circuit Lower Bounds? Conclusions Circuit lower bounds are necessary. – Program run-time lower bounds do not yield bounds for fixed input sizes. We even need circuit lower bounds for small circuit classes. Seemingly-modest improvements to existing lower bounds would yield exciting separations of complexity classes. There may be cause for renewed optimism.
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