1. 3/20/20091 More State Machines. Multiple processes

2. 3/20/20092 Mealy Outputs State diagram Ref: Chapter 10, RTL Hardware Design Using VHDL

3. 3/20/20093 Mealy Outputs Revised state diagram (sm2) Y=1 / Y=0 / Y=1

4. 3/20/20094 Algorithmic State Machine (ASM) Chart An alternative method for representing an FSM. It contains the same amount of information as a state diagram; it is more descriptive. Used to specify complex sequence of events and actions. An ASM is composed of a network of ASM blocks.

5. 3/20/20095 ASM Block Or actions!

6. 3/20/20096 ASM Block To reduce clutter, sometimes only the signals that are activated (asserted) are shown in the ASM. Example 1:

7. 3/20/20097 ASM Block Example 2:

8. 3/20/20098 ASM – More examples Example 3:

9. 3/20/20099 ASM –Timing Considerations An ASM block represents an state. Transitions between ASM blocks occur only at rising edges: 1- At each rising edge, the FSM enters a new ASM block. 2- During the clock period, many operations can be performed (those operations listed inside the state box). Decision boxes are also evaluated and Mealy outputs updated. 3- At the next rising edge, the result of Boolean expressions are examined simultaneously, and an exit path is determined, which leads to a new ASM block.

10. 3/20/200910 ASM – More examples A counter from 0 to 8; ASM representation: