1. Jan M. Rabaey EECS Dept. Univ. of California, Berkeley Ultra-low power and ultra-low cost wireless sensor nodes An integrated perspective

2. Meso-scale low-cost radio’s for ubiquitous wireless data acquisition that are fully integrated –Size smaller than 1 cm 3 minimize power/energy dissipation – Limiting power dissipation to 100  W enables energy scavenging and form self-configuring ad-hoc networks containing 100’s to 1000’s of nodes Meso-scale low-cost radio’s for ubiquitous wireless data acquisition that are fully integrated –Size smaller than 1 cm 3 minimize power/energy dissipation – Limiting power dissipation to 100  W enables energy scavenging and form self-configuring ad-hoc networks containing 100’s to 1000’s of nodes PicoRadio’s ─ The Original Mission Still valid, but pushing the limits ever further

3. The Incredibly Shrinking Radio Receiver RF Amp Test LNA Test Diff Osc PA Test TX1 TX2 Env Det Test Passive Test Structures Technology: 0.13  m CMOS combined with off-chip FBARs Carrier frequency: 1.9 GHz 0 dBm OOK Two Channels Channel Spacing ~ 50MHz 40 kbps/channel Total area < 8 mm 2 Technology: 0.13  m CMOS combined with off-chip FBARs Carrier frequency: 1.9 GHz 0 dBm OOK Two Channels Channel Spacing ~ 50MHz 40 kbps/channel Total area < 8 mm 2 4 mm

4. Wireless Sensor Network Protocol Processor In fab (Jan 04) Technology0.13μ CMOS Chip Size3mm x 2.75mm = 8.2 mm 2 Transistor Count3.2M Gate Count62.5K gates Clocks Freqs16MHz(Main), 1MHz(BB) On Chip memory68Kbytes Core Supply Voltages 1V(High) –0.3V(Low) On_Power< 1 mW Standby Power  Ws 64K memory DW8051 μc Base Band Serial Interface GPIO Interface Locationing Engine Neighbor List System Supervisor DLL Network Queues Voltage Conv Integrates all digital protocol and applications functions of wireless sensor node Runs reliable and energy-optimized protocol stack (from application level down)

5. Voltage Supply Voltage Supply 20MHz Clock Source Voltage Supply OOK Receiver Flash Storage Sensor2 Sensor1 PrgThresh0PrgThresh1 OOK Transmitter Tx0Tx2 User Interface SIF = sensor interface LocalHW MAC DW8051 256 DATA sfrbus or membus? ADC 4kB XDATA 16kB CODE PHY Chip Supervisor SIF ADC Serial GPIO FlashIF Serial Digital Network Processor RF Transceiver Solar Cell The Road towards a First Integrated PicoNode Powertrain Board Design In Process

6. Energy-Scavenging becoming a Reality Tx COB Front cap regulator Front Demonstrate a self contained 1.9GHz transmitter - powered only by Solar & Vibrational scavenged energy Push integration limits - limited by dimensions of solar cell Light LevelDuty Cycle Low Indoor Light0.36% Fluorescent Indoor Light0.53% Partly Cloudy Outdoor Light5.6% Bright Indoor Lamp11% High Light Conditions100% Vibration Level Duty Cycle 2.2m/s 2 1.6% 5.7m/s 2 2.6%

7. Perspectives: Where are we heading? Extrapolating towards the future: how far can we push cost, size, and power? –Ultra-dense sensor networks (“smart surfaces”) enabled by sub 10  W nodes. –Cutting RF power by at least another factor of 5 (if not more) –Pushing the boundaries on voltage scaling Focus on the application perspective –A Service-based Application Interface for Sensor Networks –Focus on issues such as portability, universality, scalability, and ad-hoc deployment

8. An Application Perspective to Sensor Networks A plethora of implementation strategies emerging, some of them being translated into standards TinyOs/TinyDB The juggernaut is rolling … but is it the right approach? Bottom-up definition without perspective on interoperability and portability Little reflection on how this translates into applications

9. Network Layer Service Layer A Quest: A Universal Application Interface (AI) for Sensor Networks Supports essential services such as queries, commands, time synchronization, localization, and concepts repository Similar in concept to the socket interface in the internet Provides a single point for providing interoperability Independent of implementation architecture and hardware platform –Allows for alternative PHY, MAC, and Network approaches and keeps the door open for innovation Application Application Interface Query/Command Naming Time/Synchronization Location SNSP

10. SNSP Status (joint project with GSRC (ASV) and TU Berlin) White paper completed and in feedback gathering mode (http://bwrc.eecs.berkeley.edu/research/picoradio/...)http://bwrc.eecs.berkeley.edu/research/picoradio Very positive support so far (both from industry and academia) Next targets: –Further evolve document (start working group) –Demonstrate feasibility by implementation on at least two test beds –Address number of issues left open for research (e.g. implementation approaches for naming, synchronization, localization, and concept repository services) Currently in process of acquiring funding (NSF, European Commission, CEC, …)

11. Extrapolation of the low-power theme: Ultra-dense sensor networks How to get nodes substantially smaller and cheaper (“real” mm 3 nodes): get them closer, use lots of them, and make their energy consumption absolutely minimal (this is < 10  W). “Smart surfaces”: plane wings, smart construction materials, intelligent walls How to get there? Go absolutely non-traditional! –Use non-tuned mostly passive radio’s – center carrier frequency randomly distributed –Use statistical distribution to ensure reliable data propagation

12. On the Road: Reducing RF power by another factor of 5 Providing gain at minimal current: The Super-regenerative Receiver 1500  m 1200  m Fully Integrated 400  A when active (~200  W with 50% quench duty cycle) Back from fab any day

13. Realizing sub-50  W receivers Supply voltage0.5 – 1.2V Current consumption 150μA Oscillation frequency 1.5GHz Differential output swing 150mV (V dd =500mV) Phase noise-100dBc/Hz @1MHz offset Simulated Performance Example: sub-threshold RF oscillator using integrated LCs (in fab) Next step: mostly untuned radio’s and lots of them Combine with purely statistical routing (in collaboration with Kannan)

14. Ultra-Low Voltage (ULV) Digital Design Aggressive voltage scaling the premier way of reducing power consumption; Performance not an issue Our goals: design at 250 mV or below Challenges: –Wide variation in gate performance due to variability of thresholds and device dimensions –Sensitivity to dynamic errors due to noise and particle-caused upsets (soft errors)  Explore circuit and architecture techniques that deal with performance variations and are (somewhat) resilient to errors! TM synch. asynch. Chip Supervisor Time reference Tcl Tcl’ Idea: Self-adapting approach to ULV Status: White paper