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Presentation 1: Noise canceling in 1-D data Seri Rahayu Abd Rauf Fatima Boujarwah Juan Chen Liyana Mohd Sharipp Arti Thumar M2
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Overview Part of a research done in CMU –Micron: Intelligent Microsurgical Instruments project led by Prof Pradeep Khosla This design uses adaptive weighted-frequency algorithm for noise canceling purposes.
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Project Background: Noise Canceling Chip 1. An essential block in a research project done here at CMU: Micron: Intelligent Microsurgical Instrument 2. Main objective of the research : To provide a technique to compensate the amount of errors due to “physiological hand tremor, jerk, low- frequency wander and also pathological movement disorder.” To enhance the accuracy of human-machine interfaces. To improve the living of patients with movement disorders. To increase performance in microsurgery applications. Source: http://www-2.cs.cmu.edu/~camr/research.htmlhttp://www-2.cs.cmu.edu/~camr/research.html
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Applications Microsurgery Instrument Rehabilitation Image sources: http://irb.cs.tu-berlin.de/~zuse/history/ibm158c.jpghttp://irb.cs.tu-berlin.de/~zuse/history/ibm158c.jpg http://www.richard-wolf.com/english/e_image/ww_hp4.jpg
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Applications Vehicle / Aircraft Maneuvering Hearing Aid Image sources: http://www.ahaanet.com/hearingaidstyles.asphttp://www.ahaanet.com/hearingaidstyles.asp http://hometown.aol.com/jaywhle/extreme/control.gif
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How does the chip work? It uses adaptive weighted frequency algorithm in 1-D data. Input: Human motion signal with noise introduced by pathological and physiological tremor. Output: Noise suppressed signal for higher precision.
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Block Diagram Source: Modeling and Canceling Tremor in Human-Machine Interfaces
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Result Source: Modeling and Canceling Tremor in Human-Machine Interfaces
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Transistor Estimate PartTransistors 8-bit Adders12x8x24 = 2304 8-bit Multipliers10x1200 = 12000 ROM800 Registers10x8x14 = 1160 Misc3000 Total≈ 19210
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Status Design Proposal √ Architecture (in progress) To be done: Floor Plan Gate Level Design Component Layout Chip Layout Spice Simulation of Entire Chip
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Problems… Several inputs are too small for bit shifting (10^-7…) Value of M could be made greater for higher precision (More complex) Transistor count seems too simple…really, it is NOT
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Goal Higher throughput
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Alternatives Serpent encryption Branch predictor
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Summary Why do we choose this?
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Questions?
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