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1 4-bit ALU Cailan Shen Ting-Lu Yang Advisor: Dr. Parent May 11, 2005.

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Presentation on theme: "1 4-bit ALU Cailan Shen Ting-Lu Yang Advisor: Dr. Parent May 11, 2005."— Presentation transcript:

1 1 4-bit ALU Cailan Shen Ting-Lu Yang Advisor: Dr. Parent May 11, 2005

2 2 Agenda Introduction Project (Experimental) Details –ALU design in Cadence –DFF, MUX and Adder Summary –Project result –Lesson learned

3 3 Introduction The 4-bit ALU that our group designed can perform following functions: –Add, Subtract, NOR, OR, and AND. The 4-bit ALU operates at 200 MHz with an area of 300 um x 320 um and use 1.3 mW power. The 4-bit ALU is made up of 4 identical 1-bit ALU, and DFFs ensure the 4-bit ALU to obtain the correct inputs and send out correct outputs. This project is worthwhile because this ALU has all the logic blocks that we learned in class.

4 4 Project Description and ALU Schematic -1-bit Adder -Four 2 to 1 MUXs -1 AND and 1 OR gates -Four control inputs, two data inputs.

5 5 Longest Path Calculations Note: All widths are in microns and capacitances in fF

6 6 4-bit ALU Layout and LVS

7 7 Simulation ALU Control LinesFunction A_invB_invOP1OP0 0000AND 0001OR 0010ADD 0110SUBTRACT 1100NOR Inputs AB 1010 1011 A – B = 1010 -1011 =1111 Cout = 0 (Borrowed)

8 8 Verification of Final Output

9 9 Power = 1.3 mW

10 10 Summary After this project, we became familiar with Cadence tool and the fundamental concepts of IC design. The total area is = 300um x 320um The power = 1.3mW Lessons learned How to fix the LVS error Learn how to work in a team Learn how to make trade offs

11 11 Acknowledgements Thanks to Cadence Design Systems for the VLSI lab Thanks to Synopsys for Software donation. Thanks to Professor David Parent.


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