1. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Bus-Based Computer Systems zDesigning with microprocessors. zDevelopment and debugging. zSystem-level performance analysis.

2. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. System architectures zArchitectures and components: ysoftware; yhardware. zSome software is very hardware- dependent.

3. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Hardware platform architecture Contains several elements: zCPU; zbus; zmemory; zI/O devices: networking, sensors, actuators, etc. How big/fast much each one be?

4. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Software architecture Functional description must be broken into pieces: zdivision among people; zconceptual organization; zperformance; ztestability; zmaintenance.

5. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Hardware and software architectures Hardware and software are intimately related: zsoftware doesn’t run without hardware; zhow much hardware you need is determined by the software requirements: yspeed; ymemory.

6. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Evaluation boards zDesigned by CPU manufacturer or others. zIncludes CPU, memory, some I/O devices. zMay include prototyping section. zCPU manufacturer often gives out evaluation board netlist---can be used as starting point for your custom board design.

7. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Adding logic to a board zProgrammable logic devices (PLDs) provide low/medium density logic. zField-programmable gate arrays (FPGAs) provide more logic and multi-level logic. zApplication-specific integrated circuits (ASICs) are manufactured for a single purpose.

8. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. The PC as a platform zAdvantages: ycheap and easy to get; yrich and familiar software environment. zDisadvantages: yrequires a lot of hardware resources; ynot well-adapted to real-time.

9. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Typical PC hardware platform CPU CPU bus memory DMA controller timers bus interface bus interface high-speed bus low-speed bus device intr ctrl

10. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Typical busses zPCI: standard for high-speed interfacing y33 or 66 MHz. yPCI Express. zUSB (Universal Serial Bus), Firewire (IEEE 1394): relatively low-cost serial interface with high speed.

11. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Software elements zIBM PC uses BIOS (Basic I/O System) to implement low-level functions: yboot-up; yminimal device drivers. zBIOS has become a generic term for the lowest-level system software.

12. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Example: StrongARM zStrongARM system includes: yCPU chip (3.686 MHz clock) ysystem control module (32.768 kHz clock). Real-time clock; operating system timer general-purpose I/O; interrupt controller; power manager controller; reset controller.

13. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Debugging embedded systems zChallenges: ytarget system may be hard to observe; ytarget may be hard to control; ymay be hard to generate realistic inputs; ysetup sequence may be complex.

14. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Host/target design zUse a host system to prepare software for target system: target system host system serial line

15. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Host-based tools zCross compiler: ycompiles code on host for target system. zCross debugger: ydisplays target state, allows target system to be controlled.

16. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Software debuggers zA monitor program residing on the target provides basic debugger functions. zDebugger should have a minimal footprint in memory. zUser program must be careful not to destroy debugger program, but, should be able to recover from some damage caused by user code.

17. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Breakpoints zA breakpoint allows the user to stop execution, examine system state, and change state. zReplace the breakpointed instruction with a subroutine call to the monitor program.

18. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. ARM breakpoints 0x400 MUL r4,r6,r6 0x404 ADD r2,r2,r4 0x408 ADD r0,r0,#1 0x40c B loop uninstrumented code 0x400 MUL r4,r6,r6 0x404 ADD r2,r2,r4 0x408 ADD r0,r0,#1 0x40c BL bkpoint code with breakpoint

19. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Breakpoint handler actions zSave registers. zAllow user to examine machine. zBefore returning, restore system state. ySafest way to execute the instruction is to replace it and execute in place. yPut another breakpoint after the replaced breakpoint to allow restoring the original breakpoint.

20. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. In-circuit emulators zA microprocessor in-circuit emulator is a specially-instrumented microprocessor. zAllows you to stop execution, examine CPU state, modify registers.

21. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Logic analyzers zA logic analyzer is an array of low-grade oscilloscopes:

22. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Logic analyzer architecture UUT sample memory microprocessor controller system clock clock gen state or timing mode vector address display keypad

23. Boundary scan zSimplifies testing of multiple chips on a board. yRegisters on pins can be configured as a scan chain. yUsed for debuggers, in-circuit emulators. © 2008 Wayne Wolf Overheads for Computers as Components

24. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. How to exercise code zRun on host system. zRun on target system. zRun in instruction-level simulator. zRun on cycle-accurate simulator. zRun in hardware/software co-simulation environment.

25. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Debugging real-time code zBugs in drivers can cause non- deterministic behavior in the foreground problem. zBugs may be timing-dependent.

26. System-level performance analysis zPerformance depends on all the elements of the system: yCPU. yCache. yBus. yMain memory. yI/O device. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. memory CPU cache

27. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Bandwidth as performance zBandwidth applies to several components: yMemory. yBus. yCPU fetches. zDifferent parts of the system run at different clock rates. zDifferent components may have different widths (bus, memory).

28. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Bandwidth and data transfers zVideo frame: 320 x 240 x 3 = 230,400 bytes. yTransfer in 1/30 sec.  Transfer 1 byte/  sec, 0.23 sec per frame. yToo slow. zIncrease bandwidth: yIncrease bus width. yIncrease bus clock rate.

29. Bus bandwidth zT: # bus cycles. zP: time/bus cycle. zTotal time for transfer: yt = TP. zD: data payload length. zO1 + O2 = overhead O. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. O1DO2 W T basic (N) = (D+O)N/W

30. Bus burst transfer bandwidth zT: # bus cycles. zP: time/bus cycle. zTotal time for transfer: yt = TP. zD: data payload length. zO1 + O2 = overhead O. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. BO W T burst (N) = (BD+O)N/(BW) 21 …

31. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Memory aspect ratios 64 M 16 M 8 M 14 8

32. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Memory access times zMemory component access times comes from chip data sheet. yPage modes allow faster access for successive transfers on same page. zIf data doesn’t fit naturally into physical words: yA = [(E/w)mod W]+1

33. Bus performance bottlenecks zTransfer 320 x 240 video frame @ 30 frames/sec = 612,000 bytes/sec. zIs performance bottleneck bus or memory? © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. memory CPU

34. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed. Bus performance bottlenecks, cont’d. zBus: assume 1 MHz bus, D=1, O=3: yT basic = (1+3)612,000/2 = 1,224,000 cycles = 1.224 sec. zMemory: try burst mode B=4, width w=0.5. yT mem = (4*1+4)612,000/(4*0.5) = 2,448,000 cycles = 0.2448 sec.

35. Performance spreadsheet © 2000 Morgan Kaufman Overheads for Computers as Components

36. Parallelism zSpeed things up by running several units at once. zDMA provides parallelism if CPU doesn’t need the bus: yDMA + bus. yCPU. © 2008 Wayne Wolf Overheads for Computers as Components 2 nd ed.