1. Lab 6 – Part C2 Circuit for Problem 3.6 p 20

2. a b s y z = ~s & a w = s & b = ~s & a  s & b b s a ~s w = (b & s ) z = (a & ~s ) y = ~ (z & w) De Morgan’s Theorem : y = z  w = ~ (~z & ~w) ~s

3. b s a w = ~ (b & s ) z = ~ (a & ~s ) y = ~ (z & w ) Note that we now have four NAND gates so we can implement the above circuit using the 7400 chip b s a ~s w = (b & s ) z = (a & ~s ) y = ~ (z & w)

4. a b s y ~s & a s & b = ~s & a  s & b as b s & b ~s & a ~s 0 0 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 1 1 1 1 0 1 0 0 0 00 0 0 0 0 1 0 0 0 1 1 0 1 0 0 1 1 0 0 0 01 y 1 ~s

5. b s a w = ~ (b & s ) z = ~ (a & ~s ) y = ~ (z & w ) as b ~(b & s)~(a & ~s) ~s 0 0 0 0 1 0 0 0 1 0 1 1 1 0 1 1 0 0 1 1 0 1 1 1 1 1 1 0 1 0 0 0 11 1 1 1 1 0 1 0 0 1 1 0 1 0 1 0 0 1 1 1 10 y 1

6. a b s y a & ~s b & s = b & s  a & ~s b s a ~s w = ~ (b & s ) z = ~ (a & ~s ) y = ~ (z & w ) Thus the two circuits above realize the same function