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Correlator design(s) Trade-offs 20 July 2009 Christian Holler/Kris Zarb Adami Oxford University.

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Presentation on theme: "Correlator design(s) Trade-offs 20 July 2009 Christian Holler/Kris Zarb Adami Oxford University."— Presentation transcript:

1 Correlator design(s) Trade-offs 20 July 2009 Christian Holler/Kris Zarb Adami Oxford University

2 Bolometer vs. Interferometer Only about 25 bolometer beams (blue dots) fit over the cluster area, with a low filling factor due to the diffraction-limited single-mode optics. None of the other bolometers in the array (of which there may be a thousand) contribute to the image. In contrast all the interferometer antennas point directly at the cluster. Background image is an actual interferometric image of a rich cluster at 30 GHz, made with a telescope (CBI2) with filling factor f = 0.7, Tsys = 35 K

3 Complex lag-correlator layout

4 Amiba Correlator

5 GUBBINS Broad-band Correlator (2-20GHz) layout

6 3D-Correlator layout for large N correlators Antenna1 Antenna2 Antenna3 time delay

7 Correlator layout

8 Taking as a goal the requirement to correlate Nant = 90 antennas with B = 40GHz bandwidth and Nch = 8 frequency channels, the approximate number of operations required is: Nop = 16B ln 2(Nch)Nant + 2Nant(Nant − 1)B = 815Top/s assuming an FX correlator and a single polarization (four times larger for full polarization).

9 Digital FPGA/ASIC Correlators and Spectrometers  Multiplier replaced by digital logic, fourier transform replaced by complex multipliers  Largest advantage in F-X correlators specifically for spectroscopic science  Can be built quickly with Off-the-Shelf Products using standard FPGA(s) and network switches  Very stable, analogue and systematic effects (such as band-pass, differential mismatch) can be corrected  RFI Excision and other effects can be easily incorporated – an example of this could be a digital back-end to C- BASS which is possible with today’s technology  Easily programmable, possible use for on-the-fly systematic reduction, template matching

10 ALMA Correlator

11

12 Digital Correlator Design Limitations ADC front-end (max. of 8-bit 56 GSa/s reported in literature) Network switch, Back-plane and inter- chip communications for large-N correlators Processing capability and power consumption (~1 Top/s; ~300W) Not likely in the next 5 years BUT, digital spectrometers are possible

13 Back up Slides

14 Wilkinson power divider

15 Andrew Harris‘ and Steve Maas‘ multiplier

16 Digital FPGA/ASIC Spectrometers


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