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6.1 Introduction Two details related to instructions –The way instructions are specified –The ways that operands can be specified
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6.2 Zero, One, Two, or Three Address Designs An arbitrary number of operands implies variable length instructions Fetching an arbitrary number of operands takes times
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6.3 Zero Operands per Instruction A zero address architecture is also called a stack architecture Operands are implicit
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6.4 One operand per Instruction An One address design relies on an implicit operand for each instruction: –A special register known as accumulator Add X –Add x to accumulator
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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6.5 Two Operands per Instruction An operation can be applied to specified value instead of merely to accumulator –Add X Y –Move Q R
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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6.6 Three Operands per Instruction The third operand can specify a destination –Add X Y Z
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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Operand Sources and Immediate Values Operand that specifies a source –A signed constant –An unsigned constant –The contents of a register –The values in a memory location
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Operand Sources and Immediate Values(2) Operand that specifies a destation – a single register –A pair of continuous registers –A memory location
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6.8 the Von Neumann Bottleneck The time spent performing memory accesses can limit the overall performance To avoid the bottleneck –Restrict most operand to registers
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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6.10 Operands that Combine Multiple Values Each operand consist of three fields that specify a type, a register, and an offset.
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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6.11 Tradeoffs in the Choice of Operands Several potential design goals –Ease of programming –Fewer instructions –Smaller instructions –Larger range of immediate values –Faster operand fetch and decode –Decreased hardware size
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6.12 Values in Memory and Indirect Reference Indirection through register –Obtain A, the current value from register –Interpret A as memory address, and fetch operand from memory
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6.12 Values in Memory and Indirect Reference(2) Indirection through a memory address –Obtain M, the value in the operand –Interpret M as memory address, and fetch the value A from memory –Interpret A as memory address, and fetch operand from memory
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From Essentials of Computer Architecture by Douglas E. Comer. ISBN 0131491792. © 2005 Pearson Education, Inc. All rights reserved.
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6.13 Operand Addressing Mode Immediate value Direct register reference Indirect through a register Direct memory reference Indirect memory reference
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