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3-D Nano-scratching in silicon and silicon carbide Dr John A Patten Jerry Jacob Western Michigan University, Kalamazoo, MI Manufacturing Research Center.

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Presentation on theme: "3-D Nano-scratching in silicon and silicon carbide Dr John A Patten Jerry Jacob Western Michigan University, Kalamazoo, MI Manufacturing Research Center."— Presentation transcript:

1 3-D Nano-scratching in silicon and silicon carbide Dr John A Patten Jerry Jacob Western Michigan University, Kalamazoo, MI Manufacturing Research Center

2 Overview of presentation Introduction to HPPT in ceramics Examples of HPPT in ceramics Scratching experiments on silicon Scratching experiments on silicon carbide Simulations of scratching experiments –Silicon –Silicon Carbide Results and Discussion Conclusions

3 Basics of HPPT and importance in Ceramics Definition of HPPT and relation to hardness of the material. D-B-T depth in ceramics. Importance of HPPT in ceramic manufacturing.

4 Examples of HPPT in ceramics

5 Scratching experiments in silicon

6 Simulation setup for silicon scratching Process parametersValueUnitSchematic (Actual) Depth of Cut, doc115*nm Length of Cut, loc10.0µm Cutting Speed, v0.305mm/s Friction factor0.1- Custom tool file for simulations * Programmed depth of cut was 125 nm

7 Silicon Simulation result Pressures at the tool-workpiece interface are at least 12GPa or higher. 12 GPa is the hardness of this silicon material.

8 Silicon Simulation result – cont’d Thrust force value from simulation at 115 nm is lower than experimental value at 75 nm.

9 Scratching experiments in silicon carbide Scratching parameters Tool: Diamond Stylus with 5 µm radius Speed: 0.005 mm/sec Scratch length: 5 mm Load Range: 10 to 25 grams for Poco Graphite sample and 1 to 10 grams for CoorsTek Polished Samples used Poco Graphite CVD coated SiC surface roughness of <100 nm (Ra) and Coors Tek CVD coated SiC surface roughness of <10 nm

10 Determination of D-B-T depth Optical image of a typical D-B-T in a scratch

11 Wyko RST image of Ductile scratch on CVD coated SiC

12 Simulation setup for silicon carbide ParametersValueUnitGeometry Programmed Depth (feed)125nm Actual depth, doc103nm Length of Cut, loc10.0µm Cutting Speed, v0.305mm/s Friction factor, µ0.1, 0.26, 0.6-

13 Result from simulations of silicon carbide Cutting force values are lower because simulation depth (105 nm) is smaller than experimental depth (120 nm). Thrust force values show good agreement.

14 Summary of simulations and conclusion Summary of 3-D scratching simulations –Si simulations show simulation thrust force is lower than experimental value. Material model needs to be validated –SiC simulations show thrust forces in good agreement with the experiment. –SiC simulations show cutting forces that are not in very good agreement with the experiment. depths are different 3-D scratching work shows encouraging results –initial attempts at simulations of ductile behavior of ceramic materials nanometer depths, below the DBT depth of these nominally brittle materials.

15 Acknowledgements National Science Foundation for the research grant (DMR). Andy Grevstad and Third Wave Systems for software and funding support. Dr Guichelaar (WMU) for equipment at the Tribology lab. Lei Dong at University of North Carolina at Charlotte Si work) Biswarup Bhattacharya (WMU) for CVD coated SiC work.

16 Questions and comments Contact: john.patten@wmich.edu


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