1. מבנה מחשבים הרצאה 1 מבנה מחשבים Lecture 1 Course Introduction Eytan Ruppin and Alon Schclar Slides from Randy H. Katz, John Wawrzynek and Dan Garcia Berkeley

2. הרצאה 1 שקף 2 Lecture Overview  Introduction : Computer Architecture  Administrative Matters  Engineering:  ממוליכים וחשמל ועד פעולות בינריות בסיסיות במחשב מתח חשמלי מוליכים סיליקון : מוליך למחצה טרנזיסטור פעולות בינריות ברכיבים אלקטרוניים

3. הרצאה 1 שקף 3 What is “Computer Architecture”? Computer Architecture =  Instruction Set Architecture +  Machine Organization + …  = הנדסה + ארכיטקטורה

4. הרצאה 1 שקף 4 The Instruction Set: a Critical Interface instruction set software hardware

5. הרצאה 1 שקף 5 מבנה מחשבים What are “Machine Structures”? *Coordination of many levels (layers) of abstraction I/O systemProcessor Compiler Operating System (Linux, Win,..) Application (ex: browser) Digital Design Circuit Design Instruction Set Architecture Datapath & Control transistors Memory Hardware Software Assembler

6. הרצאה 1 שקף 6 Levels of Representation High Level Language Program Assembly Language Program Machine Language Program Control Signal Specification Compiler Assembler Machine Interpretation temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; lw$15,0($2) lw$16,4($2) sw$16,0($2) sw$15,4($2) 0000 1001 1100 0110 1010 1111 0101 1000 1010 1111 0101 1000 0000 1001 1100 0110 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 °°°° ALUOP[0:3] <= InstReg[9:11] & MASK

7. הרצאה 1 שקף 7 Instruction Set Architecture (subset of Computer Architecture) “... the attributes of a [computing] system as seen by the programmer, i.e., the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” – Amdahl, Blaaw, and Brooks, 1964SOFTWARE Organization of Programmable Storage Data Types & Data Structures: Encodings & Representations Instruction Set Instruction Formats Modes of Addressing and Accessing Data Items and Instructions Exceptional Conditions

8. הרצאה 1 שקף 8 MIPS R3000 Instruction Set Architecture (Summary)  Instruction Categories Load/Store Computational Jump and Branch Floating Point -coprocessor Memory Management Special R0 - R31 PC HI LO OP rs rt rdsafunct rs rt immediate jump target 3 Instruction Formats: all 32 bits wide Registers Q: How many already familiar with MIPS ISA?

9. הרצאה 1 שקף 9 Execution Cycle Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

10. הרצאה 1 שקף 10 What is “Computer Architecture”?  Coordination of many levels of abstraction  Under a rapidly changing set of forces  Design, Measurement, and Evaluation I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Datapath & Control Layout

11. הרצאה 1 שקף 11 Anatomy: 5 components of any Computer Personal Computer Processor Computer Control (“brain”) Datapath (“brawn”) Memory (where programs, data live when running) Devices Input Output Keyboard, Mouse Display, Printer Disk (where programs, data live when not running)

12. הרצאה 1 שקף 12 SO  All computers consist of five components Processor: (1) datapath and (2) control (3) Memory (4) Input devices and (5) Output devices  Not all “memory” are created equally Cache: fast (expensive) memory are placed closer to the processor Main memory: less expensive memory--we can have more  Interfaces are where the problems are - between functional units and between the computer and the outside world  Need to design against constraints of performance, power, area and cost

13. הרצאה 1 שקף 13 Organization  Capabilities & performance characteristics of principal functional units (e.g., Registers, ALU, Shifters, Logic Units,...)  Ways in which these components are interconnected  Information flows between components  Logic and means by which such information flow is controlled  Choreography of FUs to realize the ISA  Register Transfer Level (RTL) Description Logic Designer's View ISA Level FUs & Interconnect

14. הרצאה 1 שקף 14 Forces on Computer Architecture Computer Architecture Technology Programming Languages Operating Systems History Applications Cleverness

15. הרצאה 1 שקף 15 Computer Architecture’s Changing Definition  1950s to 1960s Computer Architecture Course Computer Arithmetic  1970s to mid 1980s Computer Architecture Course Instruction Set Design, especially ISA appropriate for compilers  1990s Computer Architecture Course Design of CPU, memory system, I/O system, Multi- processors, Networks  2000s Computer Architecture Course: Special purpose architectures, Functionally reconfigurable, Special considerations for low power/mobile processing

16. הרצאה 1 שקף 16 Technology Trends: Memory Capacity (Single-Chip DRAM) year size (Mbit) 19800.0625 19830.25 19861 19894 199216 199664 1998128 2000256 2002512 Now 1.4X/yr, or 2X every 2 years. 8000X since 1980!

17. הרצאה 1 שקף 17 Technology Trends: Microprocessor Complexity 2X transistors/Chip Every 1.5 years Called “Moore’s Law” Alpha 21264: 15 million Pentium Pro: 5.5 million PowerPC 620: 6.9 million Alpha 21164: 9.3 million Sparc Ultra: 5.2 million Moore’s Law Athlon (K7): 22 Million Itanium 2: 410 Million

18. הרצאה 1 שקף 18 Technology Trends Imply Dramatic Change  Processor Logic capacity:about 30% per year Clock rate:about 20% per year  Memory DRAM capacity:about 60% per year (4x every 3 years) Memory speed:about 10% per year Cost per bit:improves about 25% per year  Disk Capacity:about 60% per year Total data use:100% per 9 months!  Network Bandwidth Bandwidth increasing more than 100% per year!

19. הרצאה 1 שקף 19 Performance Trends Microprocessors Minicomputers Mainframes Supercomputers 1995 Year 19901970197519801985 Log of Performance

20. הרצאה 1 שקף 20 Course Administration  Instructors: Eytan Ruppin (ruppin@post.tau.ac.il)@post.tau.ac.il  TAs:Alon Schcalar (shekler@post.tau.ac.il)  Materials: http://www.cs.tau.ac.il/~ruppin  Books: 1.V. C. Hamacher, Z. G. Vranesic, S. G. Zaky Computer Organization. McGraw-Hill, 1982Computer Organization. 2.H. Taub Digital Circuits and Microporcessors. McGraw-Hill 1982 3.Hennessy and Patterson, Computer Organization Design, the hardware/software interface, Morgan Kaufman 1998

21. הרצאה 1 שקף 21 Course Content Computer Architecture and Engineering Instruction Set DesignComputer Organization InterfacesHardware Components Compiler/System ViewLogic Designer’s View ­“Building Architect”­“Construction Engineer”

22. הרצאה 1 שקף 22 Grading ציון :  מבחן סופי 80%  תרגילים 20% 8 תרגילים

23. הרצאה 1 שקף 23 Where are We Going?? מבנה מחשבים  Arithmetic Single/multicycle Datapaths IFetchDcdExecMemWB IFetchDcdExecMemWB IFetchDcdExecMemWB IFetchDcdExecMemWB PipeliningMemory Systems I/O