1. By: Richard Rashid, Avadis Tevanian, Michael Young, David Golub, Robert Baronn, David Black, William Bolosky, and Jonathan Chew, October 1987 Presented By: Oindrila Mukherjee Machine-Independent Virtual Memory Management for Paged Uniprocessor and Multiprocessor Architectures

2. Agenda Why Mach? Why Mach? Mach Background Mach Background Mach Features Mach Features Mach Design Mach Design –Mach Abstractions –Basic VM Operations Mach VM Implementation Mach VM Implementation –Data Structures –Sharing Memory –Machine-Independent/Machine-Dependent Interface VM Performance VM Performance Conclusions Conclusions

3. Why Mach ? Mach allows –Portability –User processes to perform OS functionality like paging Existing versions offer little improvement for VMM other than simple paging support. Existing versions offer little improvement for VMM other than simple paging support. Use a memory management system that is readily portable to multiprocessor as well as uniprocessor computing engines. Use a memory management system that is readily portable to multiprocessor as well as uniprocessor computing engines.

4. Mach Background Mach currently runs on Mach currently runs on –the entire VAX family of uniprocessor and multiprocessor systems –IBM PC RT –SUN 3 –Encore Multimax –Sequential Balance 21000 Machine dependent code of VMM reduced to single module and related header file. Machine dependent code of VMM reduced to single module and related header file.

5. Mach Features Compatible with UNIX 4.3BSD Compatible with UNIX 4.3BSD The Mach System supports: The Mach System supports: –Virtual address spaces –Copy-on-write virtual copy operations –Copy-on-write and read-write memory sharing between tasks –Memory-mapped files –User provided backing store objects and pagers

6. Mach Design - Abstractions Five Basic Mach Abstractions –Task –Thread –Port –Message –Memory Object

7. Mach Design - Basic VM Operations Tasks have large, sparse virtual address spaces. Tasks have large, sparse virtual address spaces. A task can A task can –allocate/deallocate virtual memory. –set protection status (current, maximum). –specify inheritance (shared, copy, none). –create and manage memory objects. Copy-on-write and read/write sharing of memory are permitted between tasks. Copy-on-write and read/write sharing of memory are permitted between tasks. Paging operations performed directly by user-state tasks. Paging operations performed directly by user-state tasks.

8. Mach VM Implementation – Data Structures Machine-Independent Section Machine-Independent Section –Resident Page Table –Address Map –Memory Object Machine-Dependent Section Machine-Dependent Section –Pmap - Hardware-defined physical address map.

9. Machine-Independent Section - Resident Page Table Basically an inverted page table. Basically an inverted page table. Entries store information on physical pages. Entries store information on physical pages. Each page entry may be simultaneously linked into a memory object list, a memory allocation queue and an object/offset hash bucket Each page entry may be simultaneously linked into a memory object list, a memory allocation queue and an object/offset hash bucket Page size is a boot time system parameter. Page size is a boot time system parameter. Pg.No. 1 2 4 10.... Object 1 -> Pg.Entries 1, 4, 10 1410 Memory Object List

10. Machine-Independent Section - Address Map Entries map a contiguous range of virtual addresses onto a contiguous area of a memory object Entries map a contiguous range of virtual addresses onto a contiguous area of a memory object Maintained as a sorted doubly linked list Maintained as a sorted doubly linked list Carries inheritance and protection attributes information. Carries inheritance and protection attributes information. Efficiently implements page fault lookups, copy/protection on address ranges and allocation/deallocation of address ranges. Efficiently implements page fault lookups, copy/protection on address ranges and allocation/deallocation of address ranges. Small in size Small in size

11. Machine-Independent Section - Memory Objects Data repository, indexed by byte, upon which various operations can be performed. Data repository, indexed by byte, upon which various operations can be performed. Reference counter per object. Reference counter per object. Pager handles page faults and page-out requests outside kernel. Pager handles page faults and page-out requests outside kernel. –Paging_object port allows access to the pager. Paging_name for every object maintained by the kernel Paging_name for every object maintained by the kernel Paging_object_request port used by pager to send messages to the kernel. Paging_object_request port used by pager to send messages to the kernel.

12. Handling Page Faults using Pagers Handling Page Faults using Pagers

13. Handling Page Faults Kernel Resident Page Table Address Map Obj1 Obj2 Obj3 Memory Obj Mgr A Memory Obj Mgr B Port 1.Search for Page 2. Pg fault 3.Look for Memory Obj. mapping 4. Send msg to fetch page and Memory obj mgr fetches page from disk 5. Update resident page table 6. Update TLB

14. Sharing Memory Sharing Memory Two address maps pointing to the same memory object. Two address maps pointing to the same memory object. Copy-on-write memory management – kernel needs information about modified pages. Copy-on-write memory management – kernel needs information about modified pages. Mach uses shadow objects. Mach uses shadow objects. Sharing Maps Sharing Maps Task Address ATask Address B Sharing Map Memory Objects

15. Machine- Independent/Machine- Dependent Interface Mach’s machine-dependent code responsible for Mach’s machine-dependent code responsible for –Pmap management –Implementing page level operations on pmaps –Ensuring appropriate hardware map is operational Pmap module need not keep track of all currently valid mappings. Pmap module need not keep track of all currently valid mappings. Pmap may delay operations that reduce protection on range of addresses. Pmap may delay operations that reduce protection on range of addresses. Implementer of pmap needs to know very little about the way Mach functions. Implementer of pmap needs to know very little about the way Mach functions.

16. VM Performance Implemented on VAX architecture Implemented on VAX architecture –MicroVAX II 11/780 and VAX 11/784 Advantages achieved with little or no effect on performance. Advantages achieved with little or no effect on performance.

17. Conclusion Mach provides sophisticated VM features without being tied to a specific hardware base. Mach provides sophisticated VM features without being tied to a specific hardware base. VM mechanisms can be used either within a multiprocessor or extended into a distributed environment. VM mechanisms can be used either within a multiprocessor or extended into a distributed environment. Separation of machine dependent and independent code improves performance. Separation of machine dependent and independent code improves performance.