1. Fai Yeung VP APAC Sales & Marketing
Trends of Programmable Logic Industry and Its Growth in Asia-Pacific PROFIT Dec 22, 2009
Fai Yeung
VP APAC Sales & Marketing

2. Programmable Imperative!
Common Challenges
Programmable
Imperative!
“Differentiate or Die”
Accelerated Time to Market
“Fickle Market
Demands
Shorter Life Cycle
Spiraling Complexity
Capped Engineering Budgets
Green
Lowest TCO 2

3. The Time for Programmables is Now!
Market Forces
Programmable Imperative!
Financial Constraints
Technology Innovation
When you look at the these three converging factors of market pressures, financial pressures, and where technology is headed, we see that we have a “perfect storm” of opportunity.
As our customers need to reduce their development costs and respond faster to demands of their markets, we see a strong need for solutions which are more flexible and can allow for rapid and cost-effective change.
Flexible programmability is an absolute must.
Customers are seeing capped engineering budgets
Complexity is spiralling with more sophisticated products and it is becoming less viable to design from scratch.
Product lifecycles are becoming shorter which gives customers less development time (e.e. consumer product lifecycles used to be an average 3-5 years, now less than a year)
Market demands are becoming fickle and difficult to predict – demands change as products are being designed. In high volume consumer applications, they cannot predict requirements – they are designing core sets of capabilities, then adding differentiated capabilities to the core using FPGA’s so they can address numerous markets
All of these are issues that can be addressed with programmable logic. This shift in dynamics creates the opportunity for what we call the “programmable imperative.”
We have been talking for 25 years about this kind of “programmable imperative,” but it is only now that the conditions have to come to exist that make it a reality (evolution per Moore’s Law; ability to incorporate more functions and features in smaller nodes; price pressures for developing ASICs and ASSPs). These three gating factors have never converged before in the same way – the time for FPGA’s is now, and that’s what makes the future so exciting for Xilinx. 3

4. Programmable Imperative!
Market Forces
Market Forces
Programmable Imperative!
Financial Constraints
Technology Innovation
When you look at the these three converging factors of market pressures, financial pressures, and where technology is headed, we see that we have a “perfect storm” of opportunity.
As our customers need to reduce their development costs and respond faster to demands of their markets, we see a strong need for solutions which are more flexible and can allow for rapid and cost-effective change.
Flexible programmability is an absolute must.
Customers are seeing capped engineering budgets
Complexity is spiralling with more sophisticated products and it is becoming less viable to design from scratch.
Product lifecycles are becoming shorter which gives customers less development time (e.e. consumer product lifecycles used to be an average 3-5 years, now less than a year)
Market demands are becoming fickle and difficult to predict – demands change as products are being designed. In high volume consumer applications, they cannot predict requirements – they are designing core sets of capabilities, then adding differentiated capabilities to the core using FPGA’s so they can address numerous markets
All of these are issues that can be addressed with programmable logic. This shift in dynamics creates the opportunity for what we call the “programmable imperative.”
We have been talking for 25 years about this kind of “programmable imperative,” but it is only now that the conditions have to come to exist that make it a reality (evolution per Moore’s Law; ability to incorporate more functions and features in smaller nodes; price pressures for developing ASICs and ASSPs). These three gating factors have never converged before in the same way – the time for FPGA’s is now, and that’s what makes the future so exciting for Xilinx. 4

5. Time-to-market and flexibility: Key attributes for success
Key Market Trends
Rapid consumer-driven change
Hyper-connectivity
evolving standards, market req’ts, short lifecycles- flexibility is key
Fickle, fragmented markets
Time-to-market and flexibility: Key attributes for success 5 5

6. Financial Constraints
Market Forces
Programmable Imperative!
Technology Drivers
Financial Constraints
When you look at the these three converging factors of market pressures, financial pressures, and where technology is headed, we see that we have a “perfect storm” of opportunity.
As our customers need to reduce their development costs and respond faster to demands of their markets, we see a strong need for solutions which are more flexible and can allow for rapid and cost-effective change.
Flexible programmability is an absolute must.
Customers are seeing capped engineering budgets
Complexity is spiralling with more sophisticated products and it is becoming less viable to design from scratch.
Product lifecycles are becoming shorter which gives customers less development time (e.e. consumer product lifecycles used to be an average 3-5 years, now less than a year)
Market demands are becoming fickle and difficult to predict – demands change as products are being designed. In high volume consumer applications, they cannot predict requirements – they are designing core sets of capabilities, then adding differentiated capabilities to the core using FPGA’s so they can address numerous markets
All of these are issues that can be addressed with programmable logic. This shift in dynamics creates the opportunity for what we call the “programmable imperative.”
We have been talking for 25 years about this kind of “programmable imperative,” but it is only now that the conditions have to come to exist that make it a reality (evolution per Moore’s Law; ability to incorporate more functions and features in smaller nodes; price pressures for developing ASICs and ASSPs). These three gating factors have never converged before in the same way – the time for FPGA’s is now, and that’s what makes the future so exciting for Xilinx. 6

7. Continued Rise of ASIC/ASSP Development Costs
Rising costs at advanced process nodes
($M)
IC Cost by Process Node
$100M
$61M
$34M
Cost of development is becoming prohibitively expensive for ASSP’s as we move to new process nodes
This means that it only makes sense for them to be produced for mass markets. This is simple economics – manufacturers cannot get an ROI from small volume markets. Broadcom, Qualcomm and others are focusing on a small set of extremely high volume applications because they cannot afford to play more broadly
e.g. if it takes $100M to develop a standard product for a specific market, it needs to be a $1bn market in order to justify the investment (given that you won’t capture an entire market with your product)
Customers are seeking to provide more diverse solutions that cannot be addressed by standard products. This need for hardware differentiation is going to cause the demand for FPGA’s to grow
Can we use the Chartered/Synopsys numbers and foil: development costs are higher than this.
The minimum market size is probably understated
$24M
$16.1M
$10.1M
Process Nodes (nm)
Source: Chartered and Synopsys 7 7

8. WW ASIC Design Starts 22% Decline in 2009
"More likely, we will see a large percentage of these questionable designs not hit any production and die a slow death by indefinite push-outs”
Bryan Lewis, Gartner Analyst

9. Tier 1 Semiconductor Company Challenges
Manufacturing transition: Fabbed  Fablite  Fabless
300mm Fab Costs:
45nm = $3B
32nm - $10B
Target market rationalization and consolidation
Pursuing ultra high volume applications
Source: GSA

10. Tier 2 ASSP Vendor Challenges
Narrow Focus to high volume applications
($M)
IC Cost by Process Node
$100M
$500
$400
$61M
$300
$34M
Minimum Market Size ($M)
$200
$24M
$16.1M
$100
$10.1M
Cost of development is becoming prohibitively expensive for ASSP’s as we move to new process nodes
This means that it only makes sense for them to be produced for mass markets. This is simple economics – manufacturers cannot get an ROI from small volume markets. Broadcom, Qualcomm and others are focusing on a small set of extremely high volume applications because they cannot afford to play more broadly
e.g. if it takes $100M to develop a standard product for a specific market, it needs to be a $1bn market in order to justify the investment (given that you won’t capture an entire market with your product)
Customers are seeking to provide more diverse solutions that cannot be addressed by standard products. This need for hardware differentiation is going to cause the demand for FPGA’s to grow
Can we use the Chartered/Synopsys numbers and foil: development costs are higher than this.
The minimum market size is probably understated
Process Nodes (nm)
Profitability and business model under severe pressure
29 /115 companies followed by GSA, have market cap < cash
Source: Chartered and Synopsys 10 10 10

11. Tier 3 Startup Challenges: Funding has Vanished
Round-A funding (dollar amount) declined 82% from 2000 and 2007
*Through Q308, only 2 chip companies received Round-A funding, totaling $12M
Source: GSA

12. What FPGA Means to Systems Customers
Do more with less
Improve engineering productivity
Reduce risk profile
Avoid big bets on ASIC design starts
Focus on core competencies
Differentiate or die 12 12

13. FPGA Technology Innovation
Market Forces
Programmable Imperative!
Financial Constraints
Technology Innovation
Last but not least- are changes to FPGA technology that enable broader applicability- in order to capitalize on this growing application gap we need to reduce the cost and power, increase the bandwidth/speed and make FPGAs more application-ready so customers can quickly adapt to their needs- today we are announcing major steps in all 4 areas…
Cost
Power
Bandwidth
Application-ready 13

14. Introducing Virtex-6 and Spartan-6 FPGA Families
Deliver up to 60% lower system cost
Cut power consumption by 65%
Reduce development time by 50%
Achieve over 1Tbps IO bandwidth
Delivering customer breakthrough performance, power and cost benefits to push programmability beyond the tipping point
40nm/45nm in production CY10
Next gen technology coming 14

15. The Growing ASIC/ASSP Application Gap
Market Size
ASIC / ASSP Class Applications
Underserved Applications
This has created an application gap where ASSPs aren’t available and ASICs aren’t cost effective
Traditional FPGA Class Applications
Application Market Segments
+ 100s More 15

16. Xilinx Growth Opportunity Ahead
ASIC
New Growth
ASSP
We have an opportunity to take a slice from the traditional ASIC and ASSP markets with our FPGA products.
If other chips are highly expensive to produce, and cannot be easily changed if a shift in the market breeds a new set of requirements, then this opens the path for flexibility and programmability – which is the opportunity for FPGA’s.
It is a well documented trend that the number of ASICs is continuing to drop. They are becoming more targeted to high volume applications e.g. video games and cellphones
New applications are emerging that can be serviced by FPGA’s – today they are serviced by ASICs or ASSPs – our aim is to take an ever increasing slice of this $100bn market
Source: iSuppli, March 2008 16 16

17. APAC Growth Trend 3G/LTE Wired Industrial/Scientific Medical Consumer
Green IT
Surveillance
Intelligent Video
Video Analytics
Cloud Computing
Security Infrastructure 17

18. The future of FPGA has never been brighter
Technology causes ASSP development costs continue to rise as it lowers the power and cost of FPGA – Advantage FPGA
No Differentiation with ASSP – Advantage FPGA
Multi- Core is non-deterministic and very difficult to program, FPGA tools are getting faster and easier ( C to Gates) – Advantage FPGA
Multi-Core may drive more FPGA deployment (acceleration and load leveling) - Advantage FPGA
DSP’s need accelerators and lag the market need – Advantage FPGA 18

19. The Time for Programmables is Now!
Market Forces
Important
Programmable Imperative!
Financial Constraints
Technology Innovation
Summarize each force- M
So now is the time for the programmable imperative
Economy makes it urgent
Market needs make it important
Targeted Design Platforms with new silicon families make it possible
arket: Change, connectivity,
Urgent
Possible 19

20. Thank You 20

21. Semiconductors Power the Information Revolution
Integrated Circuit by
Jack Kilby
Moore’s Law by Gordon Moore
FPGA by Ross Freeman
FPGA inventor
Xilinx Co-Founder
2009 National Inventors Hall of Fame 21

22. Xilinx Historic Revenue

23. Xilinx Revenue Breakdown Q3 Calendar Year 2009
Revenue by Geography
Revenue by End Market
Consumer
& Auto
Asia
Pacific
Data
Processing
Japan
Industrial
& Other
Europe
Here’s a breakdown of our customers by end market segment. The bulk of our revenues come from the communications sector which includes both the networking and telecommunications market. Recently, Xilinx has made a large push into new end markets such as Consumer (flat panels, set top boxes) and Automotive (telematics).
Geographically, most of our customers are based in North America. However, we expect Asia Pacific to be the fastest growing region at Xilinx over the next several years due to a combination of contract manufacturing growth in region (from other regions) along with large revenue increases in emerging countries such as China.
North America
Communications
Source: Xilinx, Inc. 5

24. 25 Years of Xilinx Great assets: foundation for a bright future
Cisco
Great key customer relationships
Huawei
Sony
Harman
Becker
Communications
Industrial and Other
Consumer and Automotive
Data processing
Diversified customers and markets
So at the time of our 25th anniversary Xilinx is a strong company and well positioned to capitalize on the programmable imperative.
Excellent financial scorecard
50% Market Share
Cash & Investments $2B
Operating Cash Flow: $581M
Financial Stability 24 24