1. Using DSP to Improve the Performance of a Doherty Amplifier Yu Zhao, Masaya Iwamoto, Larry Larson and Peter Asbeck High Speed Device&Circuit Group

2. 6/16/2015 High Speed Device&Circuit Group Introduction To reduce DC power consumption in wireless communication »Increase overall efficiency of RF PA  Use Doherty structure To maintain performance of transmitter »Achieve adequate linearity ( for CDMA and OFDM)  Use DSP to control Doherty Amplifier

3. 6/16/2015 High Speed Device&Circuit Group Extended Doherty amplifier »architecture »measured results without DSP Simulated application of DSP to Doherty amplifier »control strategy »behavioral model »simulation result Conclusions Agenda

4. 6/16/2015 High Speed Device&Circuit Group Low power range »only Main-PA operates »Reff =   R L High power range »Main-PA goes into saturation, Aux-PA turns on »Reff =  R L Extended Doherty uses  »Achieves wider high efficiency range R eff Zc=RLZc=RL /4 Main PA Auxiliary PA RLRL ZoZo /4 P in P out Advantages of Doherty Architecture 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 00.20.40.60.81 P out (normalized) Efficiency 10dB output back-off Extended Doherty (  =4) Classical Doherty (  =2) Class B Class A

5. 6/16/2015 High Speed Device&Circuit Group Gain ACPR1 ACPR2 Circuit shows good efficiency over wide power range Experimental Results --- Gain,Efficiency&ACPR GCS InGaP/GaAs HBT 0 10 20 30 40 50 60 -10-5051015202530 P out (dBm) PAE Gain Drain efficiency ACPR is still a concern

6. 6/16/2015 High Speed Device&Circuit Group ACPR1=-46 to -48 dBc (3:1 VSWR) PAE=10 to 15% (3:1 VSWR) center=50.00+0.00j 10.0 12.5 46 UCSD_P16_V4.0_F950.bin PAE=+14.2% ACP1=+47.2dB ACP2=+62.6dB Load:69.00+15.00j PAE=+13.2% Gain=+7.0dB ACP1=+47.8dB ACP2=+63.4dB P out =16dBm ACPR1=-38 to -58 dBc (3:1 VSWR) PAE=12 to 35% (3:1 VSWR) ACPR1 PAE P out =25dBm center=50.00+0.00j 12.5 15.0 17.5 20.0 25.0 30.0 35.0 38 40 42 44 46 48 50 52 54 56 58 UCSD_P25_V4.0_F950.bin PAE=+33.0% ACP1=+46.9dB ACP2=+55.6dB Load:69.00+15.00j PAE=+35.1% Gain=+8.1dB ACP1=+51.4dB ACP2=+55.1dB Experimental Results --- Load-Pull Measurements taken at Conexant Systems Inc.

7. 6/16/2015 High Speed Device&Circuit Group Relative input of Main & Aux amplifier- A2/A1, Φ2 - Φ1 »Maintain magnitude&phase balance Bias point of Auxiliary amplifier – Vgg2 »Maintain magnitude&phase balance and good efficiency Eliminate additional phase shifter Design Issues where DSP Can Help Vgg2 DSPDSP I I Q Q Pre_amp Main /4 Auxiliary Input match Input match A2, Φ 2 A1, Φ1 Zc=RLZc=RL /4 Φ2 - Φ1

8. 6/16/2015 High Speed Device&Circuit Group -2 -1.5 -0.5 0 0.5 1 051015202530 -20 -15 -10 -5 0 5 10 05 15202530 Pout (dBm) Sweep Φ2 - Φ1 A2/A1 = 1.5 constant Bias = - 4.0 V constant Normalized Phase Normalized Gain Simulation Results --- Phase Difference Φ1, Φ2 /4 Main PA Auxiliary PA RF_signal1 RF_signal2 A1, Φ 1 A2, Φ 2 Phase Distortion(degree) Gain Distortion(dB) Pout (dBm)

9. 6/16/2015 High Speed Device&Circuit Group Design Issues where DSP Can Help Relative input of Main & Aux amplifier- A2/A1, Φ2 - Φ1 »Maintain magnitude&phase balance Bias point of Auxiliary amplifier – Vgg2 »Maintain magnitude&phase balance and good efficiency Eliminate additional phase shifter Vgg2 DSPDSP I I Q Q Pre_amp Main /4 Auxiliary Input match Input match A2, Φ 2 A1, Φ1 Zc=RLZc=RL /4 A2/A1

10. 6/16/2015 High Speed Device&Circuit Group -2 -1.5 -0.5 0 0.5 1 051015202530 Pout (dBm) Gain Distortion(dB) Set A1=1,Sweep A2 Φ2 - Φ1 = 90° constant Bias = - 4.0 V constant /4 Main PA Auxiliary PA RF_signal1 RF_signal2 A1, Φ 1 -8 -6 -4 -2 0 2 4 6 8 10 05 15202530 Pout (dBm) Phase Distortion(degree) Normalized Phase Normalized Gain Simulation Results --- Power Split Ratio A1, A2 A2, Φ 2

11. 6/16/2015 High Speed Device&Circuit Group Design Issues where DSP Can Help Relative input of Main & Aux amplifier- A2/A1, Φ2 - Φ1 »Maintain magnitude&phase balance Bias point of Auxiliary amplifier – Vgg2 »Maintain magnitude&phase balance and good efficiency Eliminate additional phase shifter Vgg2 DSPDSP I I Q Q Pre_amp Main /4 Auxiliary Input match Input match A2, Φ 2 A1, Φ1 Zc=RLZc=RL /4

12. 6/16/2015 High Speed Device&Circuit Group Simulation Results --- Different Bias change bias of Aux-PA A2/A1 = 1.5 constant Φ2 - Φ1 = 90° constant 0 10 20 30 40 50 60 051015202530 Drain Efficiency (% ) Pout (dBm) -6 -4 -2 0 2 4 6 8 10 05 15202530 Pout (dBm) Normalized Phase Phase Distortion(degree) -2 -1.5 -0.5 0 0.5 1 051015202530 Pout (dBm) Normalized Gain Gain Distortion(dB)

13. 6/16/2015 High Speed Device&Circuit Group DSP Control Strategy Given input signal &desired Pout, choose optimum Vgg2, A2/A1 and Φ2(t)-Φ1(t) to maintain relatively constant gain, phase with maximum efficiency Signal splitter a1(t)/a2(t) Base band X(t) Power level X1(t) --- to Main PA Look-up-table θ2(t)-θ1(t) X2(t) --- to Aux PA Bias of Aux PA DSP Block

14. 6/16/2015 High Speed Device&Circuit Group Pin (dBm) Normalized Phase Gain DSP Control Algorithm ---Based on simulation data When Pin < 10 dBm Choose: A1/A2=1.5 Φ2 - Φ1 = 100° Vgg2 = - 4.4 V When 10 < Pin < 15 dBm Change Vgg2 (-3.8 to -3.92 V) Drain Efficiency (% ) Pout (dBm) Phase Distortion(degree) Gain Distortion(dB) Vgg2

15. 6/16/2015 High Speed Device&Circuit Group Pin (dBm) Normalized Phase Gain Drain Efficiency (% ) Pout (dBm) Phase Distortion(degree) Gain Distortion(dB) Vgg2 When 15 < Pin < 18 dBm Choose: A1/A2=1.5 Φ2 - Φ1 = 90° Vgg2 = - 3.80 V DSP Control Algorithm ---Based on simulation data

16. 6/16/2015 High Speed Device&Circuit Group Pin (dBm) Normalized Phase Gain Drain Efficiency (% ) Pout (dBm) Phase Distortion(degree) Gain Distortion(dB) Vgg2 When Pin > 18 dBm Choose: A1/A2=1.5 Φ2 - Φ1 = 85° Vgg2 = - 3.92 V DSP Control Algorithm ---Based on simulation data

17. 6/16/2015 High Speed Device&Circuit Group Simulated Amplifier with DSP Control PA’s behavioral model with DSP control (Blue) and the “best” without DSP control (Red) (choose A2/A1 = 1.5, Φ2 - Φ1 = 90°,Vgg2= -3.44V) Pin (dBm) Phase Distortion(degree) Gain Distortion(dB) Normalized Phase Gain

18. 6/16/2015 High Speed Device&Circuit Group Simulation Results --- ACPR&Efficiency ACPR (dBc) Efficiency(%) Pout (dBm) Blue,with DSP Red,without DSP Use matlab to compute spectrum of CDMA signal

19. 6/16/2015 High Speed Device&Circuit Group Conclusions Extended Doherty amplifier can achieve high efficiency over wide output power range PA Simulation based on behavior model shows CDMA ACPR specification can be met with DSP optimization We believe DSP can make circuit design easier and improve performance significantly