1. Basic Logic Gates and De Morgan's Theorem Discussion D5.1 Appendix D

2. Basic Logic Gates and Basic Digital Design NOT, AND, and OR Gates NAND and NOR Gates XOR and XNOR Gates DeMorgan’s Theorem

3. NOT Gate -- Inverter X Y 0101 1010 Behavior: The output of a NOT gate is the inverse (one’s complement) of the input

4. Y = ~X (Verilog) Y = !X (ABEL) Y = not X (VHDL) Y = X’ Y = X Y = X (textook) not(Y,X) (Verilog) NOT

5. X~X~~X = X X ~X ~~X 0 1 0 1 0 1

6. AND Gate AND X Y Z Z = X & Y X Y Z 0 0 0 0 1 0 1 0 0 1 1 1

7. X & Y (Verilog and ABEL) X and Y (VHDL) X Y X * Y XY(textbook) and(Z,X,Y)(Verilog) AND U V

8. OR Gate OR X Y Z Z = X | Y X Y Z 0 0 0 0 1 1 1 0 1 1 1 1

9. OR X | Y(Verilog) X # Y(ABEL) X or Y(VHDL) X + Y(textbook) X V Y X U Y or(Z,X,Y) (Verilog)

10. Y = ~X not(Y,X) Summary of Basic Gates NOT X Y 0101 1010 X Y Z XY X Y Z AND OR X Y Z 0 0 0 0 1 0 1 0 0 1 1 1 X Y Z 0 0 0 0 1 1 1 0 1 1 1 1 Z = X & Y and(Z,X,Y) Z = X | Y or(Z,X,Y) Any logic circuit can be created using only these three gates

11. Basic Logic Gates and Basic Digital Design NOT, AND, and OR Gates NAND and NOR Gates XOR and XNOR Gates DeMorgan’s Theorem

12. NAND Gate NAND X Y Z X Y Z 0 0 1 0 1 1 1 0 1 1 1 0 Z = ~(X & Y) nand(Z,X,Y)

13. NAND Gate NOT-AND X Y Z W = X & Y Z = ~W = ~(X & Y) X Y W Z 0 0 0 1 0 1 1 0 0 1 1 1 1 0 W

14. 2-Input NAND Gate NAND X Y Z Z = ~(X & Y) nand(Z,X,Y) X Y Z 0 0 1 0 1 1 1 0 1 1 1 0

15. NOR Gate NOR X Y Z X Y Z 0 0 1 0 1 0 1 0 0 1 1 0 Z = ~(X | Y) nor(Z,X,Y)

16. NOR Gate NOT-OR X Y W = X | Y Z = ~W = ~(X | Y) X Y W Z 0 0 0 1 0 1 1 0 1 0 1 1 1 0 Z W

17. 2 Input NOR Gate NOR X Y Z Z = ~(X | Y) nor(Z,X,Y) X Y Z 0 0 1 0 1 0 1 0 0 1 1 0

18. Basic Logic Gates and Basic Digital Design NOT, AND, and OR Gates NAND and NOR Gates XOR and XNOR Gates DeMorgan’s Theorem

19. Exclusive-OR Gate X Y Z XOR X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Z = X ^ Y xor(Z,X,Y)

20. XOR X ^ Y(Verilog) X $ Y(ABEL) X @ Y xor(Z,X,Y) (Verilog)

21. 2-Input XOR Gate XOR X Y Z 0 0 0 0 1 1 1 0 1 1 1 0 Z = X ^ Y xor(Z,X,Y) X Y Z Note: if Y = 0, Z = X if Y = 1, Z = ~X Therefore, an XOR gate can be used as a controlled inverter

22. Exclusive-NOR Gate X Y Z XNOR X Y Z 0 0 1 0 1 0 1 0 0 1 1 1 Z = ~(X ^ Y) Z = X ~^ Y xnor(Z,X,Y)

23. XNOR X ~^ Y(Verilog) !(X $ Y)(ABEL) X @ Y xnor(Z,X,Y) (Verilog)

24. 2-Input XNOR Gate XNOR X Y Z 0 0 1 0 1 0 1 0 0 1 1 1 Z = ~(X ^ Y) Z = X ~^ Y xnor(Z,X,Y) Note: Z = 1 if X = Y Therefore, an XNOR gate can be used as an equality detector X Y Z

25. Basic Logic Gates and Basic Digital Design NOT, AND, and OR Gates NAND and NOR Gates XOR and XNOR Gates DeMorgan’s Theorem

26. NAND Gate X Y X Y Z Z Z = ~(X & Y)Z = ~X | ~Y = X Y W Z 0 0 0 1 0 1 1 0 0 1 1 1 1 0 X Y ~X ~Y Z 0 0 1 1 1 0 1 1 0 1 1 0 0 1 1 1 1 0 0 0

27. De Morgan’s Theorem-1 ~(X & Y) = ~X | ~Y NOT all variables Change & to | and | to & NOT the result

28. NOR Gate X Y Z Z = ~(X | Y) X Y Z 0 0 1 0 1 0 1 0 0 1 1 0 X Y Z Z = ~X & ~Y X Y ~X ~Y Z 0 0 1 1 1 0 1 1 0 0 1 0 0 1 0 1 1 0 0 0

29. De Morgan’s Theorem-2 ~(X | Y) = ~X & ~Y NOT all variables Change & to | and | to & NOT the result

30. De Morgan’s Theorem NOT all variables Change & to | and | to & NOT the result -------------------------------------------- ~X | ~Y = ~(~~X & ~~Y) = ~(X & Y) ~(X & Y) = ~~(~X | ~Y) = ~X | ~Y ~X & ~Y = ~(~~X | ~~Y) = ~(X | Y) ~(X | Y) = ~~(~X & ~Y) = ~X & ~Y