1. Performed by: Gidi Getter, Shir Borenstein Instructor: Ina Rivkin המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory הטכניון - מכון טכנולוגי לישראל הפקולטה להנדסת חשמל Technion - Israel institute of technology department of Electrical Engineering דו ” ח סיכום פרויקט Subject: Space Wire Core for LEON3 System סמסטר חורף 2008 1

2. Abstract המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 2 The subject of this project is to create a Space Wire port which is integrated into LEON3 system. The Space Wire is a serial communication protocol, designed to be used for linking different modules of a space satellite. The protocol's main advantages are its high speed support and robustness. LEON3 is a SoPC consisting of a SPARC V8 processor, a main AMBA bus and various other optional IP's. The goal of this project was to build a Space Wire unit connected to the AMBA bus of the LEON3 system, and to write a software interface controlling the unit.

3. System description המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 3 LEON3 is an open source SoPC provided by Gaisler Research. It includes a SPARC V8 processor, AMBA bus, memory controller, debug unit, and a variety of other IP’s as needed. LEON3 Processor AMBA AHB Bus AHB Controller JTAG Dbg Link Memory Controller SERIAL Dbg Link JTAGRS232 Space Wire Link LVDS RAM SRAM, DRAM etc.

4. Specification המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory GR-RASTA (GR-CPCI-XC2V) Board, which contains a Virtex-II FPGA and LVDS connectors for Space Wire. C Program driver, compiled with BCC for Sparc V8 processor. GRMON debug monitor, connected to DSU on board for debugging purposes. 4

5. SpaceWire IP Block Diagram המעבדה למערכות ספרתיות מהירות High speed digital systems laboratory 5 receiver clock transmitter clock system clock Transmitter Receiver Receive FIFO Transmit FIFO Controller AHB Controller