1. 1 COMP541 Datapaths II Montek Singh Mar 22, 2007

2. 2Topics  Continue datapath Inside ALU Inside ALU Addition and Subtraction Addition and Subtraction Implementing add/sub in ALU Implementing add/sub in ALU Shifting Shifting

3. 3Datapath  Fairly complete datapath  Arithmetic  Logic  Shifter One bit, R or L One bit, R or L

4. 4ALU  This one has 2 control lines for arithmetic  S 2 selects logical ops

5. 5 Addition and Subtraction  Let’s take side trip into how these are done at low level  Then come back to look at detailed design of ALU

6. 6 Looking Inside  Cin also an input

7. 7 Design of B Select Logic  Just straightforward truth table

8. 8 4-Bit Circuit  We’ve seen similar before

9. 9 Now Add Logic Section  Mux to choose which

10. 10 Logic Section Design  Generous number of operations

11. 11 Resulting Control

12. 12 Shifter: First Thought  Make a parallel-load, bidirectional shift register  Anything wrong with that?

13. 13 Takes Three Clocks  First clock loads shift reg  Second makes the shift  Third loads to destination reg  Any alternatives?

14. 14 Mux as Shift Register  Combinational – no clock

15. 15 Is This Better?  Three short clocks may be faster than one limited by gate delays But complex control But complex control  We have long ALU delay, so maybe this doesn’t matter  Our one-clock shifter becomes multi instruction to shift n (>1) bits

16. 16 Shifting More Than 1 Bit  Barrel shifter

17. 17 Impractical As-Is  When n gets larger, this becomes huge  Can use levels of muxes Similar to carry-lookahead adder Similar to carry-lookahead adder  Can design with transistors

18. 18Datapath  Higher-level view for hierarchical design  Can replace modules with same interface but different implementation

19. 19 Register File  Can be fairly large (32 registers)  Memory with three addresses D for write D for write A and B for read A and B for read  What are Inputs Inputs Outputs Outputs

20. 20 Function Unit  Arithmetic and shifter  Can be bypassed at output

21. 21 Control Lines  Control inputs have been blended together into one control word (see next slide)

22. 22 Operations of Func. Unit

23. 23 Particular 8-bit Datapath  For examples to follow  Note that all control lines now have sizes and names  Look at each in next slide

24. 24 Control Word  Collect all lines in a control word for convenience  Has 7 fields

25. 25 Table of Fields (for reference)

26. 26Microoperation  Microoperation  Maps to FieldDAAABAMBFSMDRWSymb.R1R2R3RegFuncWr Num.00100200300010101

27. 27 Other Examples

28. 28 Using Numeric Notation

29. 29 Have Simple Machine  With part of an instruction set  No branches, for example

30. 30Timing  Note that regs are latched on next clock

31. 31 Next Time  Either look at control  or specifically at how to add memory to your MIPS design, and implement load and store