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Analysis on Performance Controllability under Process Variability: A Step Towards Grid-Based Analog Circuit Optimizers Seobin Jung Mixed-Signal IC and System Group Seoul National University, Korea July/2011
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Challenges Current analog circuit optimizers need to explore a continuous, high-dimensional design space. They are often stuck in a local minimum. It takes a long time for simulation to be ended. Designers can not be sure whether the solution is global optimum or not. Complexities and variabilities in deeply-scaled devices pose bigger challenges. well-proximity effects, stress effects, and aging effects It’s difficult to model them precisely as a set of equations.
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Leveraging Process Variability Simulation Settings 65nm CMOS (1λ = 30nm) Process: TT Voltage: 1.2V Temperature: 25 C Simulation Settings Process variation: TT, SS, FF Voltage variation: 1.08~1.32V Temperature variation: -40~110 C Random Device Mismatch Under PVT variation and uncertainty, one design has to be sufficiently different from another to be distinguished by their performance metrics.
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Derivation of Minimum Grid Spacing (1) Modeling a noisy circuit as a Communication Channel. Signal to Noise Ratio is defined as the ratio of S to N. S = performance variation due to design parameter variation N = performance variation due to PVT variation and mismatch.
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Derivation of Minimum Grid Spacing (2) Channel Capacity Theory Shannon derived the required SNR min to transmit N-bit digital information error-free. 1-bit information(N=1) corresponds to distinguish two design points by their difference in performance.
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Experimental Results Differential Amplifier Performance P = DC gain Design Parameter D = W Fixed Values – R = 10kΩ, W tail = 20λ Ring Oscillator Performance P = Oscillator Period Design Parameter D = W load Fixed Value – W ring = 20λ
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Advantage of Using Grid The design space can be covered by finite discrete samples. E.g., with a 20% log-scale grid, a 10 range require only 13 samples. It can prevent optimizers from wasting computational efforts. Modern optimizers repeatedly evaluate similar design points to get meaningless precision or to get better local optimum. Global optimum could be found by grid-based search.
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Conclusion In presence of process variability and uncertainty, grid-based analog circuit optimizer may be a viable approach. The continuous design space can be transformed into the discrete design space. For a few common circuits, the minimum grid spacing required was quite coarse. (~20%) Since the concept of coverage can be defined, this approach can be extended to other researches.
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